Changes for page 05 Registers
Last modified by Mora Zhou on 2024/12/05 16:04
From version 2.4
edited by Leo Wei
on 2022/07/20 10:28
on 2022/07/20 10:28
Change comment:
Update document after refactoring.
To version 4.1
edited by Devin Chen
on 2024/01/25 22:23
on 2024/01/25 22:23
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... ... @@ -12,21 +12,13 @@ 12 12 |(% style="width:58px" %)3|(% style="width:263px" %)M - Intermediate|(% style="width:761px" %)((( 13 13 Common intermediate register; System special register; 14 14 ))) 15 +|(% style="width:58px" %)4|(% style="width:263px" %)S - State|(% style="width:761px" %)PLC internal states flag for step control; 16 +|(% style="width:58px" %)5|(% style="width:263px" %)T - Timer|(% style="width:761px" %)16-bit timer (1, 10 and 100ms) 17 +|(% style="width:58px" %)6|(% style="width:263px" %)C - Counter|(% style="width:761px" %)16-bit and 32-bit up/down counter; High speed counter; 18 +|(% style="width:58px" %)7|(% style="width:263px" %)D – Data register|(% style="width:761px" %)Data register; String register; Indirect addressing address; 19 +|(% style="width:58px" %)8|(% style="width:263px" %)P, I - Pointer|(% style="width:761px" %)Jump pointer; Sub-program pointer; Interrupt pointer (high speed, ); 20 +|(% style="width:58px" %)9|(% style="width:263px" %)K, H - Constant|(% style="width:761px" %)Binary, decimal, hexadecimal, floating point, etc. 15 15 16 -(% class="table-bordered" %) 17 -|=(% style="width: 58px;" %)4|=(% style="width: 268px;" %)S - State|=(% style="width: 756px;" %)PLC internal states flag for step control; 18 -|(% style="width:58px" %)5|(% style="width:268px" %)T - Timer|(% style="width:756px" %)16-bit timer (1, 10 and 100ms) 19 -|(% style="width:58px" %)6|(% style="width:268px" %)C - Counter|(% style="width:756px" %)((( 20 -16-bit and 32-bit up/down counter; High speed counter; 21 -))) 22 -|(% style="width:58px" %)7|(% style="width:268px" %)D – Data register|(% style="width:756px" %)((( 23 -Data register; String register; Indirect addressing address; 24 -))) 25 -|(% style="width:58px" %)8|(% style="width:268px" %)P, I - Pointer|(% style="width:756px" %)((( 26 -Jump pointer; Sub-program pointer; Interrupt pointer (high speed, ); 27 -))) 28 -|(% style="width:58px" %)9|(% style="width:268px" %)K, H - Constant|(% style="width:756px" %)Binary, decimal, hexadecimal, floating point, etc. 29 - 30 30 Table 2 31 31 32 32 (% border="2" class="table-bordered" %) ... ... @@ -34,9 +34,9 @@ 34 34 |X - input|X0~~X13 (Max. 12)|X0~~X43 (Max. 36)|X0~~X43 (Max. 36)|X0~~X43 (Max. 36)|X0~~X77 (Max.128) 35 35 |Y - output|Y0~~Y7 (Max. 8)|Y0~~Y27 (Max. 24)|Y0~~Y27 (Max. 24)|Y0~~Y27 (Max. 24)|Y0~~Y77 (Max.128) 36 36 37 -= ** 5.1Relay X & Y** =29 += **Relay X & Y** = 38 38 39 -== ** 5.1.1Input relay X** ==31 +== **Input relay X** == 40 40 41 41 The input relay X represents the physical inputs to PLC. It could detect the external signal states. 0 is for open circuit, 1 is for closed circuit. 42 42 ... ... @@ -65,7 +65,7 @@ 65 65 |LX3V-3624MR/MT-A(D)|X0~~X43|Y0~~Y27|LX3VE-2424MR/MT-A(D)|X0~~X27|Y0~~Y27 66 66 | | | |LX3VE-3624MR/MT-A(D)|X0~~X43|Y0~~Y27 67 67 68 -== ** 5.1.2Output replay Y** ==60 +== **Output replay Y** == 69 69 70 70 The output relay Y represents physical outputs from PLC. 0 is for open circuit, 1 is for closed circuit. 71 71 ... ... @@ -75,13 +75,13 @@ 75 75 76 76 Devices numbered in: Octal, i.e. Y0 to Y7, Y10 to Y17. 77 77 78 -= ** 5.2RelaysM** =70 += **Relay M** = 79 79 80 80 Auxiliary Relay M device is used as an intermediate variable during the execution of a program, as auxiliary relays in the practical power control system which is used to transfer the state messages. It could use the word variable formed by M variables. M variables is not directly linked with any external ports, but it could contact with the outside world by the manners of copying X to M or M to Y through the program coding. A variable M could be used repeatedly. 81 81 82 82 Devices numbered in: Decimal, i.e. M0 to M9, M10 to M19. The variables that are more than M8000 are the system-specific variables, which are used to interact with the PLC user program with the system states; part of the M variables have the feature of power-saving. 83 83 84 -== ** 5.2.1GeneralStableStateAuxiliaryRelays** ==76 +== **General stable state suxiliary relays** == 85 85 86 86 The general stable state Auxiliary relays in LX3V series PLC are M0 ~~ M499, there are total of 500 points. The type of auxiliary relay is related to its part number and PLC serial. 87 87 ... ... @@ -162,7 +162,7 @@ 162 162 163 163 ※3, The non-latched or latched feature couldn’t be changed. 164 164 165 -== ** 5.2.2Latched auxiliary relays** ==157 +== **Latched auxiliary relays** == 166 166 167 167 There are a number of latched relays whose state is retained. If a power failure should occur all output and general purpose relays are switched off. When operation is resumed the previous state of these relays is restored. 168 168 ... ... @@ -169,9 +169,9 @@ 169 169 As below pictures show, in (a), relay M500 is activated when X0 is turned ON. If X0 is turned OFF after the activation of M500, the ON state of M500 is self-retained. (b) shows Circuit Waveform diagram of (a). For using this function, (c) could makes M500 “Turn ON” all the time. 170 170 171 171 (% style="text-align:center" %) 172 -[[image:1650081615924-404.png|| class="img-thumbnail" height="107" width="600"]]164 +[[image:1650081615924-404.png||height="107" width="600" class="img-thumbnail"]] 173 173 174 -== ** 5.2.3System-specific auxiliary relays** ==166 +== **System-specific auxiliary relays** == 175 175 176 176 A PLC has a number of special auxiliary relays. These relays all have specific functions such as provide clock pulse and sign, set PLC operation mode, or use for step control, prohibit interrupt, set counter is adding count or subtract count, etc. And they are classified into the following two types. 177 177 ... ... @@ -190,7 +190,7 @@ 190 190 ** M8034: All outputs are disabled; 191 191 ** M8039: The PLC operates under constant scould mode; 192 192 193 -= ** 5.3RelaysS** =185 += **Relay S** = 194 194 195 195 State relays S is used to design and handle step procedures, controls transfer of step by STL step instructions to simplify programming design. S also could be used as M, if there is no STL instruction. Part of the S has the feature of power-saving. 196 196 ... ... @@ -284,11 +284,11 @@ 284 284 285 285 ※3, The non-latched or latched feature couldn’t be changed. 286 286 287 -== ** 5.3.1General State Relays** ==279 +== **General State Relays** == 288 288 289 289 As above picture shows, when X0=ON, then S0 set ON, and Y0 is activated. When X1=ON, then S11 set ON, and Y1 is activated. When X2=ON, S12 set ON, then Y2 is activated, as Figure 3-2 shows. 290 290 291 -== ** 5.3.2Latched State Relays** ==283 +== **Latched State Relays** == 292 292 293 293 There are a number of latched relays whose state is retained. If a power failure should occur all output and general purpose relays are switched off. When operation is resumed the previous state of these relays is restored. 294 294 ... ... @@ -297,18 +297,18 @@ 297 297 Figure 2 298 298 299 299 (% style="text-align:center" %) 300 -[[image:1650087341412-765.png|| class="img-thumbnail" height="392" width="500"]]292 +[[image:1650087341412-765.png||height="392" width="500" class="img-thumbnail"]] 301 301 302 -== ** 5.3.3Annunciator Flags** ==294 +== **Annunciator Flags** == 303 303 304 304 Some state flags could be used as outputs for external diagnosis (called annunciation) when certain applied instructions are used. 305 305 306 306 (% style="text-align:center" %) 307 -[[image:1650087434137-885.png|| class="img-thumbnail" height="84" width="400"]]299 +[[image:1650087434137-885.png||height="84" width="400" class="img-thumbnail"]] 308 308 309 309 If X1 and X2 set ON at the same time and keep more than 1 seconds, S900 is activated, if X1 or X2 is turned OFF after the activation of S900, the ON state of S900 is self-retained. If X1 and X2 set ON at the same time less than 1 seconds, S900 is not activated. 310 310 311 -= ** 5.4Timer** =303 += **Timer** = 312 312 313 313 The timer is used to perform the timing function. Each timer contains coils, contacts, and counting time value register. A driven coil sets internal PLC contacts. Various timer resolutions are possible, from 1 to 100ms. If the coil power shuts off (insufficient power), the contacts will restore to their initial states and the value will automatically be cleared. Some timers have the feature of accumulation and power-saving. 314 314 ... ... @@ -424,38 +424,38 @@ 424 424 (T192–T199) 425 425 ))) 426 426 427 -== ** 5.4.1General timer (T0~~T245)** ==419 +== **General timer (T0~~T245)** == 428 428 429 429 The timer output contact is activated when the count data reaches the value set by the constant K. 430 430 431 431 (% style="text-align:center" %) 432 -[[image:1650087703091-787.png|| class="img-thumbnail" height="133" width="500"]]424 +[[image:1650087703091-787.png||height="133" width="500" class="img-thumbnail"]] 433 433 434 434 Figure 2 435 435 436 436 As above picture shows, when X0 is on, T200 counts from zero and accumulates 10ms clock pulses. When the current value is equal to the set value 223, timer output contact is activated; the output contact of the T200 is actuated after its coil is driven by 2.23s. 437 437 438 -== ** 5.4.2Retentive Timers (T246~~T255)** ==430 +== **Retentive Timers (T246~~T255)** == 439 439 440 440 (% style="text-align:center" %) 441 -[[image:1650087743260-243.png|| class="img-thumbnail" height="150" width="500"]]433 +[[image:1650087743260-243.png||height="150" width="500" class="img-thumbnail"]] 442 442 443 443 Figure 3 444 444 445 445 As above picture shows, T250 has the ability to retain the currently reached present value even after X1 has been removed. If T1+T2=42s, T250 (open contact) set on. When X2 set ON, timer T250 will be reset. 446 446 447 -== ** 5.4.3Set value** ==439 +== **Set value** == 448 448 449 449 The set value of the timer could be determined by constant (K, H) in the program memory and could also be specified indirectly with the contents of the data register (D). 450 450 451 451 (% style="text-align:center" %) 452 -[[image:1650087806303-500.png|| class="img-thumbnail" height="176" width="400"]]444 +[[image:1650087806303-500.png||height="176" width="400" class="img-thumbnail"]] 453 453 454 454 As above program shows, D3 is set value for T10, D3=D0*2. 455 455 456 -= ** 5.5Counter** =448 += **Counter** = 457 457 458 -== ** 5.5.1Counter** ==450 +== **Counter** == 459 459 460 460 Counter performs counting function, it contains coil, contact and count value register. The current value of the counter increases each time coil C0 is turned ON. The output contact is activated when count value reach to preset value. 461 461 ... ... @@ -484,7 +484,7 @@ 484 484 485 485 ※3, The non-latched or latched feature couldn’t be changed. 486 486 487 -=== ** 5.5.1.1 16bit up counter** ===479 +=== **16bit up counter** === 488 488 489 489 16bit counters: 1 to +32,767, as below picture shows, the current value of the counter increases each time coil C0 is turned ON by X2. The output contact is activated when the coil is turned ON for the tenth time. 490 490 ... ... @@ -491,17 +491,17 @@ 491 491 After this, the counter data remains unchanged when X2 is turned ON. The counter current value is reset to ‘0’ (zero) when the RST instruction is executed by turning ON X1 in the example. The output contact Y0 is also reset at the same time. 492 492 493 493 (% style="text-align:center" %) 494 -[[image:1650088012596-185.png|| class="img-thumbnail" height="169" width="500"]]486 +[[image:1650088012596-185.png||height="169" width="500" class="img-thumbnail"]] 495 495 496 496 Figure 2 497 497 498 -=== ** 5.5.1.232bit bi-directional counter** ===490 +=== **32bit bi-directional counter** === 499 499 500 500 32bit bi-directional counters: -2,147,483,648 to +2,147,483,647. C200- 219 are general, C220- 234 are latched. 501 501 502 502 The counting direction is designated with special auxiliary relays M8200 to M8234. When the special auxiliary relay is ON, it is decremented; otherwise, it is counting up. 503 503 504 -== ** 5.5.2High speed counter** ==496 +== **High speed counter** == 505 505 506 506 Although counters C235 to C255 (21 points) are all high speed counters, they share the same range of high speed inputs. Therefore, if an input is already being used by a high speed counter, it couldnot be used for any other high speed counters or for any other purpose, i.e as an interrupt input. 507 507 ... ... @@ -519,7 +519,7 @@ 519 519 Table 3 520 520 521 521 (% style="text-align:center" %) 522 -[[image:1650088093463-330.png|| class="img-thumbnail" height="209" width="1000"]]514 +[[image:1650088093463-330.png||height="209" width="1000" class="img-thumbnail"]] 523 523 524 524 U: up counter input 525 525 ... ... @@ -534,11 +534,11 @@ 534 534 B: B phase counter input 535 535 536 536 ((( 537 -=== ** 5.5.2.11phase** ===529 +=== **1 phase** === 538 538 ))) 539 539 540 540 (% style="text-align:center" %) 541 -[[image:1650088151106-380.png|| class="img-thumbnail" height="192" width="300"]]533 +[[image:1650088151106-380.png||height="192" width="300" class="img-thumbnail"]] 542 542 543 543 Figure 4 544 544 ... ... @@ -545,11 +545,11 @@ 545 545 As above program shows, C244 is 1 phase high speed counter with start, stop and reset functions. From the table, X1~~X6 are for start and reset. C244 start counting when X12 and X6 are turned ON, the counter input terminal is X0, set value for C244 is determined by D0 (D1), so C244 could be reset by X0 or X11. 546 546 547 547 ((( 548 -=== ** 5.5.2.22phase** ===540 +=== **2 phase** === 549 549 ))) 550 550 551 551 (% style="text-align:center" %) 552 -[[image:1650088187166-773.png|| class="img-thumbnail" height="208" width="500"]]544 +[[image:1650088187166-773.png||height="208" width="500" class="img-thumbnail"]] 553 553 554 554 Figure 5 555 555 ... ... @@ -557,12 +557,12 @@ 557 557 558 558 While A phase is turned ON, if B changes state from OFF to ON, C251 executes up count operation. While A phase is turn ON, if B changes state from ON to OFF, C251 executes down count operation. According to this principle, C251 executes up count operation while machine forward, and C251 executes down count operation while machine reverse. The M8251 monitors the C251's up / down counting status, OFF is for up counting, ON is for down counting. 559 559 560 -=== ** 5.5.2.3Output Y: high speed pulse output transistor** ===552 +=== **Output Y: high speed pulse output transistor** === 561 561 562 562 * It supports up to 4 channels, and each channel maximum output frequency is 200K; 563 563 * The output frequency could be used for controlling inverter, stepper and servo motors and so on; 564 564 565 -=== ** 5.5.2.4Input X: one phase** ===557 +=== **Input X: one phase** === 566 566 567 567 * X0, X1 hardware counters (C235, C236, C246), could support 200K pulse input at the same time; 568 568 * X0, X1 software counters (C241, C244, C247, C249), could support the input of 100K pulses at the same time; ... ... @@ -569,7 +569,7 @@ 569 569 * The hardware counter could be switched to software counting using HSCS, HSCR, HSZ instructions; 570 570 * The last four X points are software counting, which could support the input of 10K pulses at the same time. 571 571 572 -=== ** 5.5.2.5Input X: A/B phase** ===564 +=== **Input X: A/B phase** === 573 573 574 574 * X0, X1 hardware counter (C251), can support 100K pulse input; 575 575 * X0, X1 software counters (C252, C254) support the simultaneous input of 50K pulses at the same time; ... ... @@ -587,7 +587,7 @@ 587 587 (two times) 588 588 )))|((( 589 589 (% style="text-align:center" %) 590 -[[image:1650088281669-717.png|| class="img-thumbnail" height="153" width="500"]]582 +[[image:1650088281669-717.png||height="153" width="500" class="img-thumbnail"]] 591 591 ))) 592 592 |((( 593 593 K4 or others ... ... @@ -597,41 +597,42 @@ 597 597 (default) 598 598 )))|((( 599 599 (% style="text-align:center" %) 600 -[[image:1650088272392-475.png|| class="img-thumbnail" height="149" width="500"]]592 +[[image:1650088272392-475.png||height="149" width="500" class="img-thumbnail"]] 601 601 ))) 602 602 603 - **✎Note:**604 - //**HSCS, HSCR and HSCZ couldn’t be used with Frequency multiplication**//605 - 606 - //**Programexample1:**//607 - 595 +(% class="box infomessage" %) 596 +((( 597 +✎Note: 598 +HSCS, HSCR and HSCZ couldn’t be used with Frequency multiplication 599 +Program example1: 608 608 If X0 input pulse number >=800,The Y0 will set ON. 609 - 610 610 X6 means reset C235. 611 - 612 612 X7 means reset Y0. 613 - 614 614 You also could use M register instead of X registers.(M is a auxiliary register 604 +))) 615 615 606 +(% class="box infomessage" %) 607 +((( 616 616 **✎Note:** Wecon PLC X input need power DC24V signal.X0 and X1 support upto 200KHZ.X2~-~-~-~--X5 upto 10K. 609 +))) 617 617 618 618 (% style="text-align:center" %) 619 -[[image:1650088411761-720.png|| class="img-thumbnail" height="315" width="800"]]612 +[[image:1650088411761-720.png||height="315" width="800" class="img-thumbnail"]] 620 620 621 621 //**Program example2: AB encoder**// 622 622 623 623 624 624 (% style="text-align:center" %) 625 -[[image:1650088448077-686.png|| class="img-thumbnail" height="137" width="850"]]618 +[[image:1650088448077-686.png||height="137" width="850" class="img-thumbnail"]] 626 626 627 627 628 628 (% style="text-align:center" %) 629 -[[image:1650088461137-192.png|| class="img-thumbnail" height="333" width="700"]]622 +[[image:1650088461137-192.png||height="333" width="700" class="img-thumbnail"]] 630 630 631 631 (% style="text-align:center" %) 632 -[[image:1650088478181-407.png|| class="img-thumbnail" height="683" width="850"]]625 +[[image:1650088478181-407.png||height="683" width="850" class="img-thumbnail"]] 633 633 634 -= ** 5.6Register D** =627 += **Register D** = 635 635 636 636 Data registers, as the name suggests, store data. The stored data could be interpreted as a numerical value or as a series of bits, being either ON or OFF. A single data register contains 16bits or one word. However, two consecutive data registers could be used to form a 32bit device more commonly known as a double word. If the contents of the data register are being considered numerically then the Most Significouldt Bit (MSB) is used to indicate if the data has a positive or negative bias. As bit devices could only be ON or OFF, 1 or 0 the MSB convention used is, 0 is equal to a positive number and 1 is equal to a negative number. 637 637 ... ... @@ -760,29 +760,29 @@ 760 760 761 761 ※3, The non-latched or latched feature couldnot be changed. 762 762 763 -== ** 5.6.1General** ==756 +== **General** == 764 764 765 765 A single data register contains 16bits or one word. However, two consecutive data registers could be used to form a 32bit device more commonly known as a double word. Data remains the same until the next time it is rewritten. When switch the PLC state (RUN to STOP or STOP to RUN), the data will be erased. If the special auxiliary relay M8033 is ON, the data in general data register will be retained while switch PLC state. 766 766 767 -== ** 5.6.2Latched** ==760 +== **Latched** == 768 768 769 769 The data in register will be retained while switch PLC state. The latched register range could be modified by parameters. 770 770 771 -== ** 5.6.3System-special** ==764 +== **System-special** == 772 772 773 773 System-special data register D8000 ~~ D8255 are used for controlling and monitoring a variety of work methods and components in PLC, such as battery voltage, scould time, and is the state of action and so on. The default value will be written into those registers while PLC power on. 774 774 775 -== ** 5.6.4Index registers V, Z** ==768 +== **Index registers V, Z** == 776 776 777 777 The index registers are same as common data registers, is 16-bit registers for data reading and writing. There are totally 64 registers, V0-V31, Z0-Z31. 778 778 779 779 The index registers could be used in combination with other registers or values by application instructions. But they couldnot be used in combination with the basic instructions and step ladder diagram instruction. 780 780 781 -== ** 5.6.5File registers D** ==774 +== **File registers D** == 782 782 783 783 The file registers start from D1000 to D7999. File registers could be secured in the program memory in units of 500 points. File registers are actually setup in the parameter area of the PLC. For every block of 500 file registers allocated and equivalent block of 500 program steps are lost. 784 784 785 -= ** 5.7Register P,I** =778 += **Register P,I** = 786 786 787 787 Pointers register P is used for entry address of jump program, and identification of sub-program starting address. 788 788 ... ... @@ -899,18 +899,19 @@ 899 899 (I010, I020, I030, I040, I050, I060) 900 900 ))) 901 901 902 -**✎Note: ** 895 +(% class="box infomessage" %) 896 +((( 897 +**✎Note: **The input X for interrupt register couldn’t be used for [high speed counter] and [SPD] instruction as the same time. 898 +))) 903 903 904 -The input X for interrupt register couldn’t be used for [high speed counter] and [SPD] instruction as the same time. 905 - 906 906 1. Sub-program pointer 907 907 908 908 As below demos show, the left one is for conditional jump with [CJ] instruction, the right one is for Sub-program call with [CALL] instruction. 909 909 910 910 (% style="text-align:center" %) 911 -[[image:1650093462249-520.png|| class="img-thumbnail" height="399" width="700"]]905 +[[image:1650093462249-520.png||height="399" width="700" class="img-thumbnail"]] 912 912 913 -== ** 5.7.1Interrupt pointer** ==907 +== **Interrupt pointer** == 914 914 915 915 An interrupt pointer and various usage of three, dedicated interrupt applied instructions; 916 916 ... ... @@ -918,7 +918,7 @@ 918 918 * EI: enable interrupt 919 919 * DI: disable interrupt 920 920 921 -== ** 5.7.2Usage of interrupt** ==915 +== **Usage of interrupt** == 922 922 923 923 * Input Interrupt: Receive signals from a particular input without being affected by the scould cycle of PLC; 924 924 * Timer Interrupt: The interrupt is repeatedly triggered at intervals of the specified time (10ms~~99ms); ... ... @@ -942,27 +942,27 @@ 942 942 |BIN float|BIN float is used for calculation in PLC internal. 943 943 |Decimal float|It is only used for monitoring and improving readability. 944 944 945 -= ** 5.8.1Constant K** =939 += **Constant K** = 946 946 947 947 [K] is decimal integer symbol, mainly used for setting the value of the timer or counter or application instruction operand values. The value range in 16-bit is -32,768 – 32,767, the value range in 32-bit is -2, 147,483, 648 – 2, 147, 483, 647. 948 948 949 -= ** 5.8.2Constant H** =943 += **Constant H** = 950 950 951 951 [H] is hexadecimal numbers symbol, mainly used for setting the value of application instruction operand value. The value range in 16-bit instruction is 0000-FFFF, the value range in 32-bit instruction is 0000, 0000– FFFF, FFFF. 952 952 953 -= ** 5.8.3Constant E** =947 += **Constant E** = 954 954 955 955 [E] is single-precision floating symbol, mainly used for setting the value of application instruction operand value. It is only available in DECMP、DEZCP、DSINH、DCOSH、DTANH、DEBCD、DEBIN、DEADD、DESUB、DEMUL、DEDIV、DEXP、DLOGE、DLOG10、DESQR、DINT、DSIN、DCOS、DTAN、DASIN、DACOS、 DATAN、DRAD、DDEG instructions in LX3VP and LX3VE series. The value range is ±1.175495 E-38~±3.402823 E+38. 956 956 957 957 (% style="text-align:center" %) 958 -[[image:1650093586748-193.png|| class="img-thumbnail" height="62" width="500"]]952 +[[image:1650093586748-193.png||height="62" width="500" class="img-thumbnail"]] 959 959 960 -= ** 5.9System-special address** =954 += **System-special address** = 961 961 962 962 (% class="table-bordered" %) 963 963 |=**M**|=(% colspan="2" %)**Description**|=**LX1S**|=**LX2N or later**|=**D**|=(% colspan="3" %)**Description**|=**LX1S**|=**LX2N or later**|= 964 964 |(% colspan="11" %)((( 965 -== ** 5.9.1System operation** ==959 +== **System operation** == 966 966 )))| 967 967 968 968 (% class="table-bordered" %) ... ... @@ -997,7 +997,7 @@ 997 997 |M8008|(% colspan="2" %)Power loss has occurred|-|O|D8008|(% colspan="3" %)The time period before shutdown when a power failure occurs (default 10ms)|-|O| 998 998 |M8009|(% colspan="2" %)Power failure of 24V DC service supply|-|O|D8009|(% colspan="3" %)The device number of module, which affected by 24VDC power failure|-|O| 999 999 |(% colspan="11" %)((( 1000 -== ** 5.9.2Clock Devices** ==994 +== **Clock Devices** == 1001 1001 )))| 1002 1002 |M8010|(% colspan="2" %)Reserved|O|O|D8010|(% colspan="3" %)Current operation cycle / scould time in units of 0.1 msec|O|O| 1003 1003 |M8011|(% colspan="2" %)Oscillates in 10 msec cycles|O|O|D8011|(% colspan="3" %)Minimum cycle/ scould time in units of 0.1 msec|O|O| ... ... @@ -1018,7 +1018,7 @@ 1018 1018 |M8018|(% colspan="2" %)When ON Real Time Clockis installed|O|O|D8018|(% colspan="3" %)Year data for use with an RTC (2000-2099)|O|O| 1019 1019 |M8019|(% colspan="2" %)Clock data has been set outof range|O|O|D8019|(% colspan="3" %)Weekday data for use with an RTC (0-6)|O|O| 1020 1020 |(% colspan="11" %)((( 1021 -== ** 5.9.3Operation Flags** ==1015 +== **Operation Flags** == 1022 1022 )))| 1023 1023 |M8020|(% colspan="2" %)Set when the result of anADDor SUBis “0”|O|O|D8020|(% colspan="3" %)Input filter setting for devicesX000 to X007 default is 10msec, (0-60)|O|O| 1024 1024 |M8021|(% colspan="2" %)((( ... ... @@ -1035,7 +1035,7 @@ 1035 1035 |M8028|(% colspan="2" %)Switch100ms/10ms timer|O|-|D8028|(% colspan="3" %)Current value of the Z index register|O|O| 1036 1036 |M8029|(% colspan="2" %)Instruction execution complete such as PLSR|O|O|D8029|(% colspan="3" %)Current value of the V index register|O|O| 1037 1037 |(% colspan="11" %)((( 1038 -== ** 5.9.4PLC Operation Mode** ==1032 +== **PLC Operation Mode** == 1039 1039 )))| 1040 1040 |M8030|(% colspan="2" %)Battery voltage is low but BATT.V LED not lit|-|O|D8030|(% colspan="3" %)Reserved| | | 1041 1041 |M8031|(% colspan="2" %)Clear all unsaved memory|O|O|D8031|(% colspan="3" %)Reserved| | | ... ... @@ -1048,7 +1048,7 @@ 1048 1048 |M8038|(% colspan="2" %)Communication parameter setting flag|O|O|D8038|(% colspan="3" %)Reserved| | | 1049 1049 |M8039|(% colspan="2" %)Constant scould|O|O|D8039|(% colspan="3" %)Constant scould time, default 0, in units of MS|O|O| 1050 1050 |(% colspan="11" %)((( 1051 -== ** 5.9.5Step Ladder (STL) Flags** ==1045 +== **Step Ladder (STL) Flags** == 1052 1052 )))| 1053 1053 |M8040|(% colspan="2" %)When ON STL state transfer is disabled|O|O|D8040|(% colspan="3" rowspan="8" %)Up to 8 active STL states, from the range S0 to S899, are stored in D8040 to D8047 in ascending numerical order (Updated at END)|O|O| 1054 1054 |M8041|(% colspan="2" %)When ON STL transfer from initial state is enabled during automatic operation|O|O|D8041|O|O| ... ... @@ -1061,7 +1061,7 @@ 1061 1061 |M8048|(% colspan="2" %)ON when annunciator monitoring has been enabled (M8049) and there is an active annunciator flag|-|O|D8048|(% colspan="3" %)Reserved| | | 1062 1062 |M8049|(% colspan="2" %)When ON D8049 is enabled for actove annunciator state monitoring.|-|O|D8049|(% colspan="3" %)Stores the lowest currently active annunciator from the range S900 to S999 (Updated at END)|-|O| 1063 1063 |(% colspan="11" %)((( 1064 -== ** 5.9.6Interrupt Control Flags** ==1058 +== **Interrupt Control Flags** == 1065 1065 )))| 1066 1066 |M8050|(% colspan="2" %)I00□ disabled|O|O|D8050|(% colspan="3" %)Reserved| | | 1067 1067 |M8051|(% colspan="2" %)I10□ disabled|O|O|D8051|(% colspan="3" %)Reserved| | | ... ... @@ -1074,7 +1074,7 @@ 1074 1074 |M8058|(% colspan="2" %)I8□□ disabled|-|O|D8058|(% colspan="3" %)Reserved| | | 1075 1075 |M8059|(% colspan="2" %)Counters disabled|-|O|D8059|(% colspan="3" %)Reserved| | | 1076 1076 |(% colspan="11" %)((( 1077 -== ** 5.9.7Error Detection** ==1071 +== **Error Detection** == 1078 1078 )))| 1079 1079 |M8060|(% colspan="2" %)I/O configuration error|-|O|D8060|(% colspan="3" %)The first I/O number of the unit or block causing the error|-|O| 1080 1080 |M8061|(% colspan="2" %)PLC hardware error|O|O|D8061|(% colspan="3" %)Error code for hardware error|O|O| ... ... @@ -1087,11 +1087,11 @@ 1087 1087 |M8068|(% colspan="2" %)Operation error latch|O|O|D8068|(% colspan="3" %)Operation error step number latched|O|O| 1088 1088 |M8069|(% colspan="2" %)Reserved| | |D8069|(% colspan="3" %)Step numbers for found errors corresponding to flags M8065 to M8067|O|O| 1089 1089 |(% colspan="11" %)((( 1090 -== ** 5.9.8High-speed ring counter** ==1084 +== **High-speed ring counter** == 1091 1091 )))| 1092 1092 |M8099|(% colspan="2" %)High-speed ring counter operation|O|O|D8099|(% colspan="3" %)High-speed ring counter, range: 0 to 32,767 in units of 0.1 ms|O|O| 1093 1093 |(% colspan="11" %)((( 1094 -== ** 5.9.9Other functions** ==1088 +== **Other functions** == 1095 1095 )))| 1096 1096 |M8100|(% colspan="2" %)SPD (X000) pulse/ minute|O|O|D8100|(% colspan="3" %)Reserved|O|O| 1097 1097 |M8101|(% colspan="2" %)SPD (X001) pulse/ minute|O|O|D8101|(% colspan="3" %)((( ... ... @@ -1112,7 +1112,7 @@ 1112 1112 |M8108|(% colspan="2" %)Reserved| | |D8108|(% colspan="3" %)Reserved| | | 1113 1113 |M8109|(% colspan="2" %)Output refresh error|O|O|D8109|(% colspan="3" %)Output refresh error device number;|O|O| 1114 1114 |(% colspan="11" %)((( 1115 -== ** 5.9.10COM1 communication settings** ==1109 +== **COM1 communication settings** == 1116 1116 )))| 1117 1117 |M8110|(% colspan="2" %)Reserved| | |D8110|(% colspan="3" %)Com1 port setting (only available in 22319, 24320, 25007 or later)|O|O| 1118 1118 |M8111|(% colspan="2" %)Reserved| | |D8111|(% colspan="3" %)Reserved| | | ... ... @@ -1125,7 +1125,7 @@ 1125 1125 |M8118|(% colspan="2" %)BD module 2 channel 3 flag bit| | |D8118|(% colspan="3" %)BD module 2 channel 3 data| | | 1126 1126 |M8119|(% colspan="2" %)BD module 2 channel 4 flag bit| | |D8119|(% colspan="3" %)BD module 2 channel 4 data| | | 1127 1127 |(% colspan="11" %)((( 1128 -== ** 5.9.11COM2 communication settings** ==1122 +== **COM2 communication settings** == 1129 1129 )))| 1130 1130 |M8120|(% colspan="2" %)Reserved| | |D8120|(% colspan="3" %)Com2 port setting, the default value is 0|O|O| 1131 1131 |M8121|(% colspan="2" %)Sending and waiting (RS instruction)|O|O|D8121|(% colspan="3" %)Station number settings, the default value is 1|O|O| ... ... @@ -1146,7 +1146,7 @@ 1146 1146 |M8128|(% colspan="2" %)Reserved| | |D8128|(% colspan="3" %)Data length for PC protocol|O|O| 1147 1147 |M8129|(% colspan="2" %)Timeout judgement|O|O|D8129|(% colspan="3" %)Timeout judgement, default value is 10 (100ms)|O|O| 1148 1148 |(% colspan="11" %)((( 1149 -== ** 5.9.12High speed & Position** ==1143 +== **High speed & Position** == 1150 1150 )))| 1151 1151 |M8130|(% colspan="2" rowspan="2" %)Selects comparison tables to be used with the HSZ instruction|O|O|D8130|(% colspan="3" %)Contains the number of the current record being processed in the HSZ comparison table|O|O| 1152 1152 |M8131|O|O|D8131|(% colspan="3" %)HSZ&PLSY speed mode|O|O| ... ... @@ -1175,7 +1175,7 @@ 1175 1175 |M8154|(% colspan="2" %)Reserved| | |D8154|(% colspan="3" %)Reserved| | | 1176 1176 |M8155|(% colspan="2" %)Reserved| | |D8155|(% colspan="3" %)Reserved| | | 1177 1177 |(% colspan="11" %)((( 1178 -== ** 5.9.13Extend function** ==1172 +== **Extend function** == 1179 1179 )))| 1180 1180 |M8156|(% colspan="2" %)Reserved| | |D8156|(% colspan="3" %)Define clear signal in Y0 (ZRN) (default is 5=Y5)|O|O| 1181 1181 |M8157|(% colspan="2" %)Reserved| | |D8157|(% colspan="3" %)Define clear signal in Y1 (ZRN) (default is 6=Y6)|O|O|