Changes for page 05 Registers
Last modified by Mora Zhou on 2024/12/05 16:04
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... ... @@ -12,21 +12,13 @@ 12 12 |(% style="width:58px" %)3|(% style="width:263px" %)M - Intermediate|(% style="width:761px" %)((( 13 13 Common intermediate register; System special register; 14 14 ))) 15 +|(% style="width:58px" %)4|(% style="width:263px" %)S - State|(% style="width:761px" %)PLC internal states flag for step control; 16 +|(% style="width:58px" %)5|(% style="width:263px" %)T - Timer|(% style="width:761px" %)16-bit timer (1, 10 and 100ms) 17 +|(% style="width:58px" %)6|(% style="width:263px" %)C - Counter|(% style="width:761px" %)16-bit and 32-bit up/down counter; High speed counter; 18 +|(% style="width:58px" %)7|(% style="width:263px" %)D – Data register|(% style="width:761px" %)Data register; String register; Indirect addressing address; 19 +|(% style="width:58px" %)8|(% style="width:263px" %)P, I - Pointer|(% style="width:761px" %)Jump pointer; Sub-program pointer; Interrupt pointer (high speed, ); 20 +|(% style="width:58px" %)9|(% style="width:263px" %)K, H - Constant|(% style="width:761px" %)Binary, decimal, hexadecimal, floating point, etc. 15 15 16 -(% class="table-bordered" %) 17 -|=(% style="width: 58px;" %)4|=(% style="width: 268px;" %)S - State|=(% style="width: 756px;" %)PLC internal states flag for step control; 18 -|(% style="width:58px" %)5|(% style="width:268px" %)T - Timer|(% style="width:756px" %)16-bit timer (1, 10 and 100ms) 19 -|(% style="width:58px" %)6|(% style="width:268px" %)C - Counter|(% style="width:756px" %)((( 20 -16-bit and 32-bit up/down counter; High speed counter; 21 -))) 22 -|(% style="width:58px" %)7|(% style="width:268px" %)D – Data register|(% style="width:756px" %)((( 23 -Data register; String register; Indirect addressing address; 24 -))) 25 -|(% style="width:58px" %)8|(% style="width:268px" %)P, I - Pointer|(% style="width:756px" %)((( 26 -Jump pointer; Sub-program pointer; Interrupt pointer (high speed, ); 27 -))) 28 -|(% style="width:58px" %)9|(% style="width:268px" %)K, H - Constant|(% style="width:756px" %)Binary, decimal, hexadecimal, floating point, etc. 29 - 30 30 Table 2 31 31 32 32 (% border="2" class="table-bordered" %) ... ... @@ -185,7 +185,7 @@ 185 185 186 186 **~ Examples:** 187 187 188 -* 180 +* \\ 189 189 ** M8033: All output statuses are retained when PLC operation is stopped; 190 190 ** M8034: All outputs are disabled; 191 191 ** M8039: The PLC operates under constant scould mode; ... ... @@ -503,7 +503,7 @@ 503 503 504 504 == **High speed counter** == 505 505 506 -Although counters C235 to C255 (21 points) are all high speed counters, they share the same range of high speed inputs. Therefore, if an input is already being used by a high speed counter, it couldnot be used for any other high speed counters or for any other purpose, i.e as an interrupt input. 498 +Although counters C235 to C255 (21 points) are all high speed counters, they share the same range of high speed inputs. Therefore, if an input is already being used by a high speed counter, it could not be used for any other high speed counters or for any other purpose, i.e as an interrupt input. 507 507 508 508 The selection of high speed counters is not free, they are directly dependent on the type of counter required and which inputs are available. 509 509 ... ... @@ -783,7 +783,7 @@ 783 783 784 784 The file registers start from D1000 to D7999. File registers could be secured in the program memory in units of 500 points. File registers are actually setup in the parameter area of the PLC. For every block of 500 file registers allocated and equivalent block of 500 program steps are lost. 785 785 786 -= **Register P,I** = 778 += **Register P, I** = 787 787 788 788 Pointers register P is used for entry address of jump program, and identification of sub-program starting address. 789 789