Changes for page 05 Registers

Last modified by Mora Zhou on 2024/12/05 16:04

From 2.6 to 2.5 From 5.1 to 4.1

From version 4.1

edited by Devin Chen
on 2024/01/25 22:23

Change comment: There is no comment for this version

To version 2.6

edited by Leo Wei
on 2022/07/28 11:27

Change comment: Update document after refactoring.

Raw
Rendered

Summary

Page properties (2 modified, 0 added, 0 removed)

Details

Page properties

Author

@@ -1,1 +1,1 @@
--XWiki.DevinChen
++XWiki.admin

Content

@@ -12,13 +12,21 @@
  |(% style="width:58px" %)3|(% style="width:263px" %)M - Intermediate|(% style="width:761px" %)(((
  Common intermediate register; System special register;
  )))
--|(% style="width:58px" %)4|(% style="width:263px" %)S - State|(% style="width:761px" %)PLC internal states flag for step control;
--|(% style="width:58px" %)5|(% style="width:263px" %)T - Timer|(% style="width:761px" %)16-bit timer (1, 10 and 100ms)
--|(% style="width:58px" %)6|(% style="width:263px" %)C - Counter|(% style="width:761px" %)16-bit and 32-bit up/down counter; High speed counter;
--|(% style="width:58px" %)7|(% style="width:263px" %)D – Data register|(% style="width:761px" %)Data register; String register; Indirect addressing address;
--|(% style="width:58px" %)8|(% style="width:263px" %)P, I - Pointer|(% style="width:761px" %)Jump pointer; Sub-program pointer; Interrupt pointer (high speed, );
--|(% style="width:58px" %)9|(% style="width:263px" %)K, H - Constant|(% style="width:761px" %)Binary, decimal, hexadecimal, floating point, etc.
++(% class="table-bordered" %)
++|=(% style="width: 58px;" %)4|=(% style="width: 268px;" %)S - State|=(% style="width: 756px;" %)PLC internal states flag for step control;
++|(% style="width:58px" %)5|(% style="width:268px" %)T - Timer|(% style="width:756px" %)16-bit timer (1, 10 and 100ms)
++|(% style="width:58px" %)6|(% style="width:268px" %)C - Counter|(% style="width:756px" %)(((
++16-bit and 32-bit up/down counter; High speed counter;
++)))
++|(% style="width:58px" %)7|(% style="width:268px" %)D – Data register|(% style="width:756px" %)(((
++Data register; String register; Indirect addressing address;
++)))
++|(% style="width:58px" %)8|(% style="width:268px" %)P, I - Pointer|(% style="width:756px" %)(((
++Jump pointer; Sub-program pointer; Interrupt pointer (high speed, );
++)))
++|(% style="width:58px" %)9|(% style="width:268px" %)K, H - Constant|(% style="width:756px" %)Binary, decimal, hexadecimal, floating point, etc.
++
  Table 2
  (% border="2" class="table-bordered" %)
@@ -26,9 +26,9 @@
  |X - input|X0~~X13 (Max. 12)|X0~~X43 (Max. 36)|X0~~X43 (Max. 36)|X0~~X43 (Max. 36)|X0~~X77 (Max.128)
  |Y - output|Y0~~Y7 (Max. 8)|Y0~~Y27 (Max. 24)|Y0~~Y27 (Max. 24)|Y0~~Y27 (Max. 24)|Y0~~Y77 (Max.128)
--= **Relay X & Y** =
++= **5.1 Relay X & Y** =
--== **Input relay X** ==
++== **5.1.1 Input relay X** ==
  The input relay X represents the physical inputs to PLC. It could detect the external signal states. 0 is for open circuit, 1 is for closed circuit.
@@ -57,7 +57,7 @@
  |LX3V-3624MR/MT-A(D)|X0~~X43|Y0~~Y27|LX3VE-2424MR/MT-A(D)|X0~~X27|Y0~~Y27
  | | | |LX3VE-3624MR/MT-A(D)|X0~~X43|Y0~~Y27
--== **Output replay Y** ==
++== **5.1.2 Output replay Y** ==
  The output relay Y represents physical outputs from PLC. 0 is for open circuit, 1 is for closed circuit.
@@ -67,13 +67,13 @@
  Devices numbered in: Octal, i.e. Y0 to Y7, Y10 to Y17.
--= **Relay M** =
++= **5.2 Relays M** =
  Auxiliary Relay M device is used as an intermediate variable during the execution of a program, as auxiliary relays in the practical power control system which is used to transfer the state messages. It could use the word variable formed by M variables. M variables is not directly linked with any external ports, but it could contact with the outside world by the manners of copying X to M or M to Y through the program coding. A variable M could be used repeatedly.
  Devices numbered in: Decimal, i.e. M0 to M9, M10 to M19. The variables that are more than M8000 are the system-specific variables, which are used to interact with the PLC user program with the system states; part of the M variables have the feature of power-saving.
--== **General stable state suxiliary relays** ==
++== **5.2.1 General Stable State Auxiliary Relays** ==
  The general stable state Auxiliary relays in LX3V series PLC are M0 ~~ M499, there are total of 500 points. The type of auxiliary relay is related to its part number and PLC serial.
@@ -154,7 +154,7 @@
  ※3, The non-latched or latched feature couldn’t be changed.
--== **Latched auxiliary relays** ==
++== **5.2.2 Latched auxiliary relays** ==
  There are a number of latched relays whose state is retained. If a power failure should occur all output and general purpose relays are switched off. When operation is resumed the previous state of these relays is restored.
@@ -161,9 +161,9 @@
  As below pictures show, in (a), relay M500 is activated when X0 is turned ON. If X0 is turned OFF after the activation of M500, the ON state of M500 is self-retained. (b) shows Circuit Waveform diagram of (a). For using this function, (c) could makes M500 “Turn ON” all the time.
  (% style="text-align:center" %)
--[[image:1650081615924-404.png||height="107" width="600" class="img-thumbnail"]]
++[[image:1650081615924-404.png||class="img-thumbnail" height="107" width="600"]]
--== **System-specific auxiliary relays** ==
++== **5.2.3 System-specific auxiliary relays** ==
  A PLC has a number of special auxiliary relays. These relays all have specific functions such as provide clock pulse and sign, set PLC operation mode, or use for step control, prohibit interrupt, set counter is adding count or subtract count, etc. And they are classified into the following two types.
@@ -182,7 +182,7 @@
  ** M8034: All outputs are disabled;
  ** M8039: The PLC operates under constant scould mode;
--= **Relay S** =
++= **5.3 Relays S** =
  State relays S is used to design and handle step procedures, controls transfer of step by STL step instructions to simplify programming design. S also could be used as M, if there is no STL instruction. Part of the S has the feature of power-saving.
@@ -276,11 +276,11 @@
  ※3, The non-latched or latched feature couldn’t be changed.
--== **General State Relays** ==
++== **5.3.1 General State Relays** ==
  As above picture shows, when X0=ON, then S0 set ON, and Y0 is activated. When X1=ON, then S11 set ON, and Y1 is activated. When X2=ON, S12 set ON, then Y2 is activated, as Figure 3-2 shows.
--== **Latched State Relays** ==
++== **5.3.2 Latched State Relays** ==
  There are a number of latched relays whose state is retained. If a power failure should occur all output and general purpose relays are switched off. When operation is resumed the previous state of these relays is restored.
@@ -289,18 +289,18 @@
  Figure 2
  (% style="text-align:center" %)
--[[image:1650087341412-765.png||height="392" width="500" class="img-thumbnail"]]
++[[image:1650087341412-765.png||class="img-thumbnail" height="392" width="500"]]
--== **Annunciator Flags** ==
++== **5.3.3 Annunciator Flags** ==
  Some state flags could be used as outputs for external diagnosis (called annunciation) when certain applied instructions are used.
  (% style="text-align:center" %)
--[[image:1650087434137-885.png||height="84" width="400" class="img-thumbnail"]]
++[[image:1650087434137-885.png||class="img-thumbnail" height="84" width="400"]]
  If X1 and X2 set ON at the same time and keep more than 1 seconds, S900 is activated, if X1 or X2 is turned OFF after the activation of S900, the ON state of S900 is self-retained. If X1 and X2 set ON at the same time less than 1 seconds, S900 is not activated.
--= **Timer** =
++= **5.4 Timer** =
  The timer is used to perform the timing function. Each timer contains coils, contacts, and counting time value register. A driven coil sets internal PLC contacts. Various timer resolutions are possible, from 1 to 100ms. If the coil power shuts off (insufficient power), the contacts will restore to their initial states and the value will automatically be cleared. Some timers have the feature of accumulation and power-saving.
@@ -416,38 +416,38 @@
  (T192–T199)
  )))
--== **General timer (T0~~T245)** ==
++== **5.4.1 General timer (T0~~T245)** ==
  The timer output contact is activated when the count data reaches the value set by the constant K.
  (% style="text-align:center" %)
--[[image:1650087703091-787.png||height="133" width="500" class="img-thumbnail"]]
++[[image:1650087703091-787.png||class="img-thumbnail" height="133" width="500"]]
  Figure 2
  As above picture shows, when X0 is on, T200 counts from zero and accumulates 10ms clock pulses. When the current value is equal to the set value 223, timer output contact is activated; the output contact of the T200 is actuated after its coil is driven by 2.23s.
--== **Retentive Timers (T246~~T255)** ==
++== **5.4.2 Retentive Timers (T246~~T255)** ==
  (% style="text-align:center" %)
--[[image:1650087743260-243.png||height="150" width="500" class="img-thumbnail"]]
++[[image:1650087743260-243.png||class="img-thumbnail" height="150" width="500"]]
  Figure 3
  As above picture shows, T250 has the ability to retain the currently reached present value even after X1 has been removed. If T1+T2=42s, T250 (open contact) set on. When X2 set ON, timer T250 will be reset.
--== **Set value** ==
++== **5.4.3 Set value** ==
  The set value of the timer could be determined by constant (K, H) in the program memory and could also be specified indirectly with the contents of the data register (D).
  (% style="text-align:center" %)
--[[image:1650087806303-500.png||height="176" width="400" class="img-thumbnail"]]
++[[image:1650087806303-500.png||class="img-thumbnail" height="176" width="400"]]
  As above program shows, D3 is set value for T10, D3=D0*2.
--= **Counter** =
++= **5.5 Counter** =
--== **Counter** ==
++== **5.5.1 Counter** ==
  Counter performs counting function, it contains coil, contact and count value register. The current value of the counter increases each time coil C0 is turned ON. The output contact is activated when count value reach to preset value.
@@ -476,7 +476,7 @@
  ※3, The non-latched or latched feature couldn’t be changed.
--=== **16bit up counter** ===
++=== **5.5.1.1 16bit up counter** ===
 bit counters: 1 to +32,767, as below picture shows, the current value of the counter increases each time coil C0 is turned ON by X2. The output contact is activated when the coil is turned ON for the tenth time.
@@ -483,17 +483,17 @@
  After this, the counter data remains unchanged when X2 is turned ON. The counter current value is reset to ‘0’ (zero) when the RST instruction is executed by turning ON X1 in the example. The output contact Y0 is also reset at the same time.
  (% style="text-align:center" %)
--[[image:1650088012596-185.png||height="169" width="500" class="img-thumbnail"]]
++[[image:1650088012596-185.png||class="img-thumbnail" height="169" width="500"]]
  Figure 2
--=== **32bit bi-directional counter** ===
++=== **5.5.1.2 32bit bi-directional counter** ===
 bit bi-directional counters: -2,147,483,648 to +2,147,483,647. C200- 219 are general, C220- 234 are latched.
  The counting direction is designated with special auxiliary relays M8200 to M8234. When the special auxiliary relay is ON, it is decremented; otherwise, it is counting up.
--== **High speed counter** ==
++== **5.5.2 High speed counter** ==
  Although counters C235 to C255 (21 points) are all high speed counters, they share the same range of high speed inputs. Therefore, if an input is already being used by a high speed counter, it couldnot be used for any other high speed counters or for any other purpose, i.e as an interrupt input.
@@ -511,7 +511,7 @@
  Table 3
  (% style="text-align:center" %)
--[[image:1650088093463-330.png||height="209" width="1000" class="img-thumbnail"]]
++[[image:1650088093463-330.png||class="img-thumbnail" height="209" width="1000"]]
  U: up counter input
@@ -526,11 +526,11 @@
  B: B phase counter input
  (((
--=== **1 phase** ===
++=== **5.5.2.1 1 phase** ===
  )))
  (% style="text-align:center" %)
--[[image:1650088151106-380.png||height="192" width="300" class="img-thumbnail"]]
++[[image:1650088151106-380.png||class="img-thumbnail" height="192" width="300"]]
  Figure 4
@@ -537,11 +537,11 @@
  As above program shows, C244 is 1 phase high speed counter with start, stop and reset functions. From the table, X1~~X6 are for start and reset. C244 start counting when X12 and X6 are turned ON, the counter input terminal is X0, set value for C244 is determined by D0 (D1), so C244 could be reset by X0 or X11.
  (((
--=== **2 phase** ===
++=== **5.5.2.2 2 phase** ===
  )))
  (% style="text-align:center" %)
--[[image:1650088187166-773.png||height="208" width="500" class="img-thumbnail"]]
++[[image:1650088187166-773.png||class="img-thumbnail" height="208" width="500"]]
  Figure 5
@@ -549,12 +549,12 @@
  While A phase is turned ON, if B changes state from OFF to ON, C251 executes up count operation. While A phase is turn ON, if B changes state from ON to OFF, C251 executes down count operation. According to this principle, C251 executes up count operation while machine forward, and C251 executes down count operation while machine reverse. The M8251 monitors the C251's up / down counting status, OFF is for up counting, ON is for down counting.
--=== **Output Y: high speed pulse output transistor** ===
++=== **5.5.2.3 Output Y: high speed pulse output transistor** ===
  * It supports up to 4 channels, and each channel maximum output frequency is 200K;
  * The output frequency could be used for controlling inverter, stepper and servo motors and so on;
--=== **Input X: one phase** ===
++=== **5.5.2.4 Input X: one phase** ===
  * X0, X1 hardware counters (C235, C236, C246), could support 200K pulse input at the same time;
  * X0, X1 software counters (C241, C244, C247, C249), could support the input of 100K pulses at the same time;
@@ -561,7 +561,7 @@
  * The hardware counter could be switched to software counting using HSCS, HSCR, HSZ instructions;
  * The last four X points are software counting, which could support the input of 10K pulses at the same time.
--=== **Input X: A/B phase** ===
++=== **5.5.2.5 Input X: A/B phase** ===
  * X0, X1 hardware counter (C251), can support 100K pulse input;
  * X0, X1 software counters (C252, C254) support the simultaneous input of 50K pulses at the same time;
@@ -579,7 +579,7 @@
  (two times)
  )))|(((
  (% style="text-align:center" %)
--[[image:1650088281669-717.png||height="153" width="500" class="img-thumbnail"]]
++[[image:1650088281669-717.png||class="img-thumbnail" height="153" width="500"]]
  )))
  |(((
  K4 or others
@@ -589,42 +589,41 @@
  (default)
  )))|(((
  (% style="text-align:center" %)
--[[image:1650088272392-475.png||height="149" width="500" class="img-thumbnail"]]
++[[image:1650088272392-475.png||class="img-thumbnail" height="149" width="500"]]
  )))
--(% class="box infomessage" %)
--(((
--✎Note:
--HSCS, HSCR and HSCZ couldn’t be used with Frequency multiplication
--Program example1:
++**✎Note: **
++//**HSCS, HSCR and HSCZ couldn’t be used with Frequency multiplication**//
++
++//**Program example1:**//
++
  If X0 input pulse number >=800,The Y0 will set ON.
++
  X6 means reset C235.
++
  X7 means reset Y0.
++
  You also could use M register instead of X registers.(M is a auxiliary register
--)))
--(% class="box infomessage" %)
--(((
  **✎Note:** Wecon PLC X input need power DC24V signal.X0 and X1 support upto 200KHZ.X2~-~-~-~--X5 upto 10K.
--)))
  (% style="text-align:center" %)
--[[image:1650088411761-720.png||height="315" width="800" class="img-thumbnail"]]
++[[image:1650088411761-720.png||class="img-thumbnail" height="315" width="800"]]
  //**Program example2: AB encoder**//
  (% style="text-align:center" %)
--[[image:1650088448077-686.png||height="137" width="850" class="img-thumbnail"]]
++[[image:1650088448077-686.png||class="img-thumbnail" height="137" width="850"]]
  (% style="text-align:center" %)
--[[image:1650088461137-192.png||height="333" width="700" class="img-thumbnail"]]
++[[image:1650088461137-192.png||class="img-thumbnail" height="333" width="700"]]
  (% style="text-align:center" %)
--[[image:1650088478181-407.png||height="683" width="850" class="img-thumbnail"]]
++[[image:1650088478181-407.png||class="img-thumbnail" height="683" width="850"]]
--= **Register D** =
++= **5.6 Register D** =
  Data registers, as the name suggests, store data. The stored data could be interpreted as a numerical value or as a series of bits, being either ON or OFF. A single data register contains 16bits or one word. However, two consecutive data registers could be used to form a 32bit device more commonly known as a double word. If the contents of the data register are being considered numerically then the Most Significouldt Bit (MSB) is used to indicate if the data has a positive or negative bias. As bit devices could only be ON or OFF, 1 or 0 the MSB convention used is, 0 is equal to a positive number and 1 is equal to a negative number.
@@ -753,29 +753,29 @@
  ※3, The non-latched or latched feature couldnot be changed.
--== **General** ==
++== **5.6.1 General** ==
  A single data register contains 16bits or one word. However, two consecutive data registers could be used to form a 32bit device more commonly known as a double word. Data remains the same until the next time it is rewritten. When switch the PLC state (RUN to STOP or STOP to RUN), the data will be erased. If the special auxiliary relay M8033 is ON, the data in general data register will be retained while switch PLC state.
--== **Latched** ==
++== **5.6.2 Latched** ==
  The data in register will be retained while switch PLC state. The latched register range could be modified by parameters.
--== **System-special** ==
++== **5.6.3 System-special** ==
  System-special data register D8000 ~~ D8255 are used for controlling and monitoring a variety of work methods and components in PLC, such as battery voltage, scould time, and is the state of action and so on. The default value will be written into those registers while PLC power on.
--== **Index registers V, Z** ==
++== **5.6.4 Index registers V, Z** ==
  The index registers are same as common data registers, is 16-bit registers for data reading and writing. There are totally 64 registers, V0-V31, Z0-Z31.
  The index registers could be used in combination with other registers or values by application instructions. But they couldnot be used in combination with the basic instructions and step ladder diagram instruction.
--== **File registers D** ==
++== **5.6.5 File registers D** ==
  The file registers start from D1000 to D7999. File registers could be secured in the program memory in units of 500 points. File registers are actually setup in the parameter area of the PLC. For every block of 500 file registers allocated and equivalent block of 500 program steps are lost.
--= **Register P,I** =
++= **5.7 Register P,I** =
  Pointers register P is used for entry address of jump program, and identification of sub-program starting address.
@@ -892,19 +892,18 @@
  (I010, I020, I030, I040, I050, I060)
  )))
--(% class="box infomessage" %)
--(((
--**✎Note: **The input X for interrupt register couldn’t be used for [high speed counter] and [SPD] instruction as the same time.
--)))
++**✎Note: **
++The input X for interrupt register couldn’t be used for [high speed counter] and [SPD] instruction as the same time.
++
 . Sub-program pointer
  As below demos show, the left one is for conditional jump with [CJ] instruction, the right one is for Sub-program call with [CALL] instruction.
  (% style="text-align:center" %)
--[[image:1650093462249-520.png||height="399" width="700" class="img-thumbnail"]]
++[[image:1650093462249-520.png||class="img-thumbnail" height="399" width="700"]]
--== **Interrupt pointer** ==
++== **5.7.1 Interrupt pointer** ==
  An interrupt pointer and various usage of three, dedicated interrupt applied instructions;
@@ -912,7 +912,7 @@
  * EI: enable interrupt
  * DI: disable interrupt
--== **Usage of interrupt** ==
++== **5.7.2 Usage of interrupt** ==
  * Input Interrupt: Receive signals from a particular input without being affected by the scould cycle of PLC;
  * Timer Interrupt: The interrupt is repeatedly triggered at intervals of the specified time (10ms~~99ms);
@@ -936,27 +936,27 @@
  |BIN float|BIN float is used for calculation in PLC internal.
  |Decimal float|It is only used for monitoring and improving readability.
--= **Constant K** =
++= **5.8.1 Constant K** =
  [K] is decimal integer symbol, mainly used for setting the value of the timer or counter or application instruction operand values. The value range in 16-bit is -32,768 – 32,767, the value range in 32-bit is -2, 147,483, 648 – 2, 147, 483, 647.
--= **Constant H** =
++= **5.8.2 Constant H** =
  [H] is hexadecimal numbers symbol, mainly used for setting the value of application instruction operand value. The value range in 16-bit instruction is 0000-FFFF, the value range in 32-bit instruction is 0000, 0000– FFFF, FFFF.
--= **Constant E** =
++= **5.8.3 Constant E** =
  [E] is single-precision floating symbol, mainly used for setting the value of application instruction operand value. It is only available in DECMP、DEZCP、DSINH、DCOSH、DTANH、DEBCD、DEBIN、DEADD、DESUB、DEMUL、DEDIV、DEXP、DLOGE、DLOG10、DESQR、DINT、DSIN、DCOS、DTAN、DASIN、DACOS、 DATAN、DRAD、DDEG instructions in LX3VP and LX3VE series. The value range is ±1.175495 E-38～±3.402823 E+38.
  (% style="text-align:center" %)
--[[image:1650093586748-193.png||height="62" width="500" class="img-thumbnail"]]
++[[image:1650093586748-193.png||class="img-thumbnail" height="62" width="500"]]
--= **System-special address** =
++= **5.9 System-special address** =
  (% class="table-bordered" %)
  |=**M**|=(% colspan="2" %)**Description**|=**LX1S**|=**LX2N or later**|=**D**|=(% colspan="3" %)**Description**|=**LX1S**|=**LX2N or later**|=
  |(% colspan="11" %)(((
--== **System operation** ==
++== **5.9.1 System operation** ==
  )))|
  (% class="table-bordered" %)
@@ -991,7 +991,7 @@
  |M8008|(% colspan="2" %)Power loss has occurred|-|O|D8008|(% colspan="3" %)The time period before shutdown when a power failure occurs (default 10ms)|-|O|
  |M8009|(% colspan="2" %)Power failure of 24V DC service supply|-|O|D8009|(% colspan="3" %)The device number of module, which affected by 24VDC power failure|-|O|
  |(% colspan="11" %)(((
--== **Clock Devices** ==
++== **5.9.2 Clock Devices** ==
  )))|
  |M8010|(% colspan="2" %)Reserved|O|O|D8010|(% colspan="3" %)Current operation cycle / scould time in units of 0.1 msec|O|O|
  |M8011|(% colspan="2" %)Oscillates in 10 msec cycles|O|O|D8011|(% colspan="3" %)Minimum cycle/ scould time in units of 0.1 msec|O|O|
@@ -1012,7 +1012,7 @@
  |M8018|(% colspan="2" %)When ON Real Time Clockis installed|O|O|D8018|(% colspan="3" %)Year data for use with an RTC (2000-2099)|O|O|
  |M8019|(% colspan="2" %)Clock data has been set outof range|O|O|D8019|(% colspan="3" %)Weekday data for use with an RTC (0-6)|O|O|
  |(% colspan="11" %)(((
--== **Operation Flags** ==
++== **5.9.3 Operation Flags** ==
  )))|
  |M8020|(% colspan="2" %)Set when the result of anADDor SUBis “0”|O|O|D8020|(% colspan="3" %)Input filter setting for devicesX000 to X007 default is 10msec, (0-60)|O|O|
  |M8021|(% colspan="2" %)(((
@@ -1029,7 +1029,7 @@
  |M8028|(% colspan="2" %)Switch100ms/10ms timer|O|-|D8028|(% colspan="3" %)Current value of the Z index register|O|O|
  |M8029|(% colspan="2" %)Instruction execution complete such as PLSR|O|O|D8029|(% colspan="3" %)Current value of the V index register|O|O|
  |(% colspan="11" %)(((
--== **PLC Operation Mode** ==
++== **5.9.4 PLC Operation Mode** ==
  )))|
  |M8030|(% colspan="2" %)Battery voltage is low but BATT.V LED not lit|-|O|D8030|(% colspan="3" %)Reserved| | |
  |M8031|(% colspan="2" %)Clear all unsaved memory|O|O|D8031|(% colspan="3" %)Reserved| | |
@@ -1042,7 +1042,7 @@
  |M8038|(% colspan="2" %)Communication parameter setting flag|O|O|D8038|(% colspan="3" %)Reserved| | |
  |M8039|(% colspan="2" %)Constant scould|O|O|D8039|(% colspan="3" %)Constant scould time, default 0, in units of MS|O|O|
  |(% colspan="11" %)(((
--== **Step Ladder (STL) Flags** ==
++== **5.9.5 Step Ladder (STL) Flags** ==
  )))|
  |M8040|(% colspan="2" %)When ON STL state transfer is disabled|O|O|D8040|(% colspan="3" rowspan="8" %)Up to 8 active STL states, from the range S0 to S899, are stored in D8040 to D8047 in ascending numerical order (Updated at END)|O|O|
  |M8041|(% colspan="2" %)When ON STL transfer from initial state is enabled during automatic operation|O|O|D8041|O|O|
@@ -1055,7 +1055,7 @@
  |M8048|(% colspan="2" %)ON when annunciator monitoring has been enabled (M8049) and there is an active annunciator flag|-|O|D8048|(% colspan="3" %)Reserved| | |
  |M8049|(% colspan="2" %)When ON D8049 is enabled for actove annunciator state monitoring.|-|O|D8049|(% colspan="3" %)Stores the lowest currently active annunciator from the range S900 to S999 (Updated at END)|-|O|
  |(% colspan="11" %)(((
--== **Interrupt Control Flags** ==
++== **5.9.6 Interrupt Control Flags** ==
  )))|
  |M8050|(% colspan="2" %)I00□ disabled|O|O|D8050|(% colspan="3" %)Reserved| | |
  |M8051|(% colspan="2" %)I10□ disabled|O|O|D8051|(% colspan="3" %)Reserved| | |
@@ -1068,7 +1068,7 @@
  |M8058|(% colspan="2" %)I8□□ disabled|-|O|D8058|(% colspan="3" %)Reserved| | |
  |M8059|(% colspan="2" %)Counters disabled|-|O|D8059|(% colspan="3" %)Reserved| | |
  |(% colspan="11" %)(((
--== **Error Detection** ==
++== **5.9.7 Error Detection** ==
  )))|
  |M8060|(% colspan="2" %)I/O configuration error|-|O|D8060|(% colspan="3" %)The first I/O number of the unit or block causing the error|-|O|
  |M8061|(% colspan="2" %)PLC hardware error|O|O|D8061|(% colspan="3" %)Error code for hardware error|O|O|
@@ -1081,11 +1081,11 @@
  |M8068|(% colspan="2" %)Operation error latch|O|O|D8068|(% colspan="3" %)Operation error step number latched|O|O|
  |M8069|(% colspan="2" %)Reserved| | |D8069|(% colspan="3" %)Step numbers for found errors corresponding to flags M8065 to M8067|O|O|
  |(% colspan="11" %)(((
--== **High-speed ring counter** ==
++== **5.9.8 High-speed ring counter** ==
  )))|
  |M8099|(% colspan="2" %)High-speed ring counter operation|O|O|D8099|(% colspan="3" %)High-speed ring counter, range: 0 to 32,767 in units of 0.1 ms|O|O|
  |(% colspan="11" %)(((
--== **Other functions** ==
++== **5.9.9 Other functions** ==
  )))|
  |M8100|(% colspan="2" %)SPD (X000) pulse/ minute|O|O|D8100|(% colspan="3" %)Reserved|O|O|
  |M8101|(% colspan="2" %)SPD (X001) pulse/ minute|O|O|D8101|(% colspan="3" %)(((
@@ -1106,7 +1106,7 @@
  |M8108|(% colspan="2" %)Reserved| | |D8108|(% colspan="3" %)Reserved| | |
  |M8109|(% colspan="2" %)Output refresh error|O|O|D8109|(% colspan="3" %)Output refresh error device number;|O|O|
  |(% colspan="11" %)(((
--== **COM1 communication settings** ==
++== **5.9.10 COM1 communication settings** ==
  )))|
  |M8110|(% colspan="2" %)Reserved| | |D8110|(% colspan="3" %)Com1 port setting (only available in 22319, 24320, 25007 or later)|O|O|
  |M8111|(% colspan="2" %)Reserved| | |D8111|(% colspan="3" %)Reserved| | |
@@ -1119,7 +1119,7 @@
  |M8118|(% colspan="2" %)BD module 2 channel 3 flag bit| | |D8118|(% colspan="3" %)BD module 2 channel 3 data| | |
  |M8119|(% colspan="2" %)BD module 2 channel 4 flag bit| | |D8119|(% colspan="3" %)BD module 2 channel 4 data| | |
  |(% colspan="11" %)(((
--== **COM2 communication settings** ==
++== **5.9.11 COM2 communication settings** ==
  )))|
  |M8120|(% colspan="2" %)Reserved| | |D8120|(% colspan="3" %)Com2 port setting, the default value is 0|O|O|
  |M8121|(% colspan="2" %)Sending and waiting (RS instruction)|O|O|D8121|(% colspan="3" %)Station number settings, the default value is 1|O|O|
@@ -1140,7 +1140,7 @@
  |M8128|(% colspan="2" %)Reserved| | |D8128|(% colspan="3" %)Data length for PC protocol|O|O|
  |M8129|(% colspan="2" %)Timeout judgement|O|O|D8129|(% colspan="3" %)Timeout judgement, default value is 10 (100ms)|O|O|
  |(% colspan="11" %)(((
--== **High speed & Position** ==
++== **5.9.12 High speed & Position** ==
  )))|
  |M8130|(% colspan="2" rowspan="2" %)Selects comparison tables to be used with the HSZ instruction|O|O|D8130|(% colspan="3" %)Contains the number of the current record being processed in the HSZ comparison table|O|O|
  |M8131|O|O|D8131|(% colspan="3" %)HSZ&PLSY speed mode|O|O|
@@ -1169,7 +1169,7 @@
  |M8154|(% colspan="2" %)Reserved| | |D8154|(% colspan="3" %)Reserved| | |
  |M8155|(% colspan="2" %)Reserved| | |D8155|(% colspan="3" %)Reserved| | |
  |(% colspan="11" %)(((
--== **Extend function** ==
++== **5.9.13 Extend function** ==
  )))|
  |M8156|(% colspan="2" %)Reserved| | |D8156|(% colspan="3" %)Define clear signal in Y0 (ZRN) (default is 5=Y5)|O|O|
  |M8157|(% colspan="2" %)Reserved| | |D8157|(% colspan="3" %)Define clear signal in Y1 (ZRN) (default is 6=Y6)|O|O|

Changes for page 05 Registers

Summary

Details

Navigation

Table of Contents