Wiki source code of 05 Registers

Last modified by Mora Zhou on 2024/12/05 16:04

version	line-number	content
1.1	1	(% class="box infomessage" %)
	2	(((
	3	The following table lists all the devices that WECON LX3V series PLC supports.
	4	)))
	5
	6	Table 1
	7
	8	(% border="2" class="table-bordered" %)
	9	\|=(% style="width: 58px;" %)No.\|=(% style="width: 263px;" %)Device\|=(% style="width: 761px;" %)Descriptions
	10	\|(% style="width:58px" %)1\|(% style="width:263px" %)X - Input\|(% style="width:761px" %)Representation of physical inputs to PLC;
	11	\|(% style="width:58px" %)2\|(% style="width:263px" %)Y - Output\|(% style="width:761px" %)Representation of physical outputs from PLC;
	12	\|(% style="width:58px" %)3\|(% style="width:263px" %)M - Intermediate\|(% style="width:761px" %)(((
	13	Common intermediate register; System special register;
	14	)))
4.1	15	\|(% style="width:58px" %)4\|(% style="width:263px" %)S - State\|(% style="width:761px" %)PLC internal states flag for step control;
	16	\|(% style="width:58px" %)5\|(% style="width:263px" %)T - Timer\|(% style="width:761px" %)16-bit timer (1, 10 and 100ms)
	17	\|(% style="width:58px" %)6\|(% style="width:263px" %)C - Counter\|(% style="width:761px" %)16-bit and 32-bit up/down counter; High speed counter;
	18	\|(% style="width:58px" %)7\|(% style="width:263px" %)D – Data register\|(% style="width:761px" %)Data register; String register; Indirect addressing address;
	19	\|(% style="width:58px" %)8\|(% style="width:263px" %)P, I - Pointer\|(% style="width:761px" %)Jump pointer; Sub-program pointer; Interrupt pointer (high speed, );
	20	\|(% style="width:58px" %)9\|(% style="width:263px" %)K, H - Constant\|(% style="width:761px" %)Binary, decimal, hexadecimal, floating point, etc.
1.1	21
	22	Table 2
	23
	24	(% border="2" class="table-bordered" %)
	25	\|=Device\|=LX3V(1S firmware)\|=LX3V (2N firmware)\|=LX3VP\|=LX3VE\|=Expansion module
	26	\|X - input\|X0~~X13 (Max. 12)\|X0~~X43 (Max. 36)\|X0~~X43 (Max. 36)\|X0~~X43 (Max. 36)\|X0~~X77 (Max.128)
	27	\|Y - output\|Y0~~Y7 (Max. 8)\|Y0~~Y27 (Max. 24)\|Y0~~Y27 (Max. 24)\|Y0~~Y27 (Max. 24)\|Y0~~Y77 (Max.128)
	28
3.1	29	= Relay X & Y =
1.1	30
3.1	31	== Input relay X ==
1.1	32
	33	The input relay X represents the physical inputs to PLC. It could detect the external signal states. 0 is for open circuit, 1 is for closed circuit.
	34
	35	The states of input relays couldn’t be modified by program instruction, the node signal (normally open, normally closed) could be unlimited use in the program.
	36
	37	If connected IO expansion module, the port starts from the main module, according to the order of the numbers. But DI is named in groups of eight. For example main module is X0~~X7, X10~~X14. The X0 in DI expansion module corresponds to X20, not X15.
	38
	39	Devices numbered in: Octal, i.e. X0 to X7, X10 to X17
	40
	41	~ [Available devices]
	42
	43	Table 1
	44
	45	(% class="table-bordered" %)
	46	\|=Model\|=Input\|=Output\|=Model\|=Input\|=Output
	47	\|LX3V-0806MR/MT-A1(D1)\|X0~~X7\|Y0~~Y5\|LX3VP-1208MR/MT-A(D)\|X0~~X7\|Y0~~Y5
	48	\|LX3V-1208MR/MT-A1(D1)\|X0~~X13\|Y0~~Y7\|LX3VP-1212MR/MT-A(D)\|X0~~X13\|Y0~~Y13
	49	\|LX3V-0806MR/MT-A2(D2)\|X0~~X7\|Y0~~Y5\|LX3VP-1412MR/MT-A(D)\|X0~~X15\|Y0~~Y13
	50	\|LX3V-1208MR/MT-A2(D2)\|X0~~X13\|Y0~~Y7\|LX3VP-1616MR/MT-A(D)\|X0~~X17\|Y0~~Y17
	51	\|LX3V-1212MR/MT-A(D)\|X0~~X13\|Y0~~Y13\|LX3VP-2416MR/MT-A(D)\|X0~~X27\|Y0~~Y17
	52	\|LX3V-1410MR/MT-A(D)\|X0~~X15\|Y0~~Y11\|LX3VP-2424MR/MT-A(D)\|X0~~X27\|Y0~~Y27
	53	\|LX3V-1412MR/MT-A(D)\|X0~~X15\|Y0~~Y13\|LX3VP-3624MR/MT-A(D)\|X0~~X43\|Y0~~Y27
	54	\|LX3V-1616MR/MT-A(D)\|X0~~X17\|Y0~~Y17\|LX3VE-1412MR/MT-A(D)\|X0~~X15\|Y0~~Y13
	55	\|LX3V-2416MR/MT-A(D)\|X0~~X27\|Y0~~Y17\|LX3VE-1616MR/MT-A(D)\|X0~~X17\|Y0~~Y17
	56	\|LX3V-2424MR/MT-A(D)\|X0~~X27\|Y0~~Y27\|LX3VE-2416MR/MT-A(D)\|X0~~X27\|Y0~~Y17
	57	\|LX3V-3624MR/MT-A(D)\|X0~~X43\|Y0~~Y27\|LX3VE-2424MR/MT-A(D)\|X0~~X27\|Y0~~Y27
	58	\| \| \| \|LX3VE-3624MR/MT-A(D)\|X0~~X43\|Y0~~Y27
	59
3.1	60	== Output replay Y ==
1.1	61
	62	The output relay Y represents physical outputs from PLC. 0 is for open circuit, 1 is for closed circuit.
	63
	64	Depending on the output element could be divided into relay type, transistor type etc.
	65
	66	If connected IO expansion module, the port starts from the main module, according to the order of the numbers. But DO is named in groups of eight. For example main module is Y0~~Y7, Y10~~Y14. The Y0 in DO expansion module corresponds to Y20, not Y15.
	67
	68	Devices numbered in: Octal, i.e. Y0 to Y7, Y10 to Y17.
	69
3.1	70	= Relay M =
1.1	71
	72	Auxiliary Relay M device is used as an intermediate variable during the execution of a program, as auxiliary relays in the practical power control system which is used to transfer the state messages. It could use the word variable formed by M variables. M variables is not directly linked with any external ports, but it could contact with the outside world by the manners of copying X to M or M to Y through the program coding. A variable M could be used repeatedly.
	73
	74	Devices numbered in: Decimal, i.e. M0 to M9, M10 to M19. The variables that are more than M8000 are the system-specific variables, which are used to interact with the PLC user program with the system states; part of the M variables have the feature of power-saving.
	75
3.1	76	== General stable state suxiliary relays ==
1.1	77
	78	The general stable state Auxiliary relays in LX3V series PLC are M0 ~~ M499, there are total of 500 points. The type of auxiliary relay is related to its part number and PLC serial.
	79
	80	Table 1
	81
	82	(% class="table-bordered" %)
	83	\|=(% style="width: 217px;" %)PLC\|=(% style="width: 181px;" %)General\|=(% style="width: 208px;" %)Latched\|=(% style="width: 238px;" %)Latched-specific\|=(% style="width: 238px;" %)System-specific
	84	\|(% style="width:217px" %)LX3V (1S firmware)\|(% style="width:181px" %)(((
	85	384 ※3
	86
	87	(M0 – M383)
	88	)))\|(% style="width:208px" %)-\|(% style="width:238px" %)(((
	89	128 ※3
	90
	91	(M383 – M511)
	92	)))\|(% style="width:238px" %)(((
	93	256
	94
	95	(M8000-M8255)
	96	)))
	97	\|(% style="width:217px" %)LX3V (2N firmware)\|(% style="width:181px" %)(((
	98	500 ※1
	99
	100	(M0 – M499)
	101	)))\|(% style="width:208px" %)(((
	102	524 ※ 2
	103
	104	(M500 – M1023)
	105	)))\|(% style="width:238px" %)(((
	106	2048 ※3
	107
	108	(M1024 – M3071)
	109	)))\|(% style="width:238px" %)(((
	110	256
	111
	112	(M8000-M8255)
	113	)))
	114	\|(% style="width:217px" %)LX3VP\|(% style="width:181px" %)(((
	115	500 ※1
	116
	117	(M0 – M499)
	118	)))\|(% style="width:208px" %)(((
	119	524 ※ 2
	120
	121	(M500 – M1023)
	122	)))\|(% style="width:238px" %)(((
	123	2048 ※3
	124
	125	(M1024 – M3071)
	126	)))\|(% style="width:238px" %)(((
	127	256
	128
	129	(M8000-M8255)
	130	)))
	131	\|(% style="width:217px" %)LX3VE\|(% style="width:181px" %)(((
	132	500 ※1
	133
	134	(M0 – M499)
	135	)))\|(% style="width:208px" %)(((
	136	524 ※ 2
	137
	138	(M500 – M1023)
	139	)))\|(% style="width:238px" %)(((
	140	2048 ※3
	141
	142	(M1024 – M3071)
	143	)))\|(% style="width:238px" %)(((
	144	256
	145
	146	(M8000-M8255)
	147	)))
	148
	149	Users could set non-latched and latched area for Auxiliary relays in PLC by parameter setting
	150
	151	※1, Non-latched area, it could be changed to latched area by parameter setting.
	152
	153	※2, Latched area, it could be changed to non-latched area by parameter setting.
	154
	155	※3, The non-latched or latched feature couldn’t be changed.
	156
3.1	157	== Latched auxiliary relays ==
1.1	158
	159	There are a number of latched relays whose state is retained. If a power failure should occur all output and general purpose relays are switched off. When operation is resumed the previous state of these relays is restored.
	160
	161	As below pictures show, in (a), relay M500 is activated when X0 is turned ON. If X0 is turned OFF after the activation of M500, the ON state of M500 is self-retained. (b) shows Circuit Waveform diagram of (a). For using this function, (c) could makes M500 “Turn ON” all the time.
	162
	163	(% style="text-align:center" %)
3.1	164	[[image:1650081615924-404.png\|\|height="107" width="600" class="img-thumbnail"]]
1.1	165
3.1	166	== System-specific auxiliary relays ==
1.1	167
	168	A PLC has a number of special auxiliary relays. These relays all have specific functions such as provide clock pulse and sign, set PLC operation mode, or use for step control, prohibit interrupt, set counter is adding count or subtract count, etc. And they are classified into the following two types.
	169
	170	* Using contacts of special auxiliary relays, coils are driven automatically by the PLC. Only the contacts of these coils may be used by a user defined program.
	171	Examples:
	172	** M8000: RUN monitor (ON during run);
	173	** M8002: Initial pulse (Turned ON momentarily when PLC starts);
	174	** M8012: 100 msec clock pulse;
	175
	176	* Driving coils of special auxiliary relays, a PLC executes a predetermined specific operation when these coils are driven by the user.
	177
	178	~ Examples:
	179
5.1	180	* \\
1.1	181	** M8033: All output statuses are retained when PLC operation is stopped;
	182	** M8034: All outputs are disabled;
	183	** M8039: The PLC operates under constant scould mode;
	184
3.1	185	= Relay S =
1.1	186
	187	State relays S is used to design and handle step procedures, controls transfer of step by STL step instructions to simplify programming design. S also could be used as M, if there is no STL instruction. Part of the S has the feature of power-saving.
	188
	189	Devices numbered in: Decimal, i.e. S0 to S9, S10 to S19.
	190
	191	Table 1
	192
	193	(% class="table-bordered" %)
	194	\|=(% rowspan="2" %)PLC\|=(% colspan="3" %)General\|=(% colspan="3" %)Latched\|=(% rowspan="2" %)Alarm
	195	\|-\|Initialized\|-\|-\|Initialized\|-
	196	\|LX3V (1S firmware)\|-\|-\|-\|(((
	197	128 ※3
	198
	199	(S0 – S127)
	200	)))\|(((
	201	10
	202
	203	(S0 – S9)
	204	)))\|(((
	205	10
	206
	207	(S10 –S19)
	208	)))\|
	209	\|LX3V (2N firmware)\|(((
	210	500 ※1
	211
	212	(S0 – S499)
	213	)))\|(((
	214	10
	215
	216	(S0 – S9)
	217	)))\|(((
	218	10
	219
	220	(S10 – S19)
	221	)))\|(((
	222	400 ※2
	223
	224	(S500 – S899)
	225	)))\|-\|-\|(((
	226	100 ※2
	227
	228	(S900 – S999)
	229	)))
	230	\|LX3VP\|(((
	231	500 ※1
	232
	233	(S0 – S499)
	234	)))\|(((
	235	10
	236
	237	(S0 – S9)
	238	)))\|(((
	239	10
	240
	241	(S10 – S19)
	242	)))\|(((
	243	400 ※2
	244
	245	(S500 – S899)
	246	)))\|-\|-\|(((
	247	100 ※2
	248
	249	(S900 – S999)
	250	)))
	251	\|LX3VE\|(((
	252	500 ※1
	253
	254	(S0 – S499)
	255	)))\|(((
	256	10
	257
	258	(S0 – S9)
	259	)))\|(((
	260	10
	261
	262	(S10 – S19)
	263	)))\|(((
	264	400 ※2
	265
	266	(S500 – S899)
	267	)))\|-\|-\|(((
	268	100 ※2
	269
	270	(S900 – S999)
	271	)))
	272
	273	※1, Non-latched area, it could be changed to latched area by parameter setting.
	274
	275	※2, Latched area, it could be changed to non-latched area by parameter setting.
	276
	277	※3, The non-latched or latched feature couldn’t be changed.
	278
3.1	279	== General State Relays ==
1.1	280
	281	As above picture shows, when X0=ON, then S0 set ON, and Y0 is activated. When X1=ON, then S11 set ON, and Y1 is activated. When X2=ON, S12 set ON, then Y2 is activated, as Figure 3-2 shows.
	282
3.1	283	== Latched State Relays ==
1.1	284
	285	There are a number of latched relays whose state is retained. If a power failure should occur all output and general purpose relays are switched off. When operation is resumed the previous state of these relays is restored.
	286
	287	[[image:file:///C:/Users/Administrator/AppData/Local/Temp/ksohtml13508/wps31.jpg\|\|alt="file:///C:\Users\Administrator\AppData\Local\Temp\ksohtml13508\wps31.jpg"]]
	288
	289	Figure 2
	290
	291	(% style="text-align:center" %)
3.1	292	[[image:1650087341412-765.png\|\|height="392" width="500" class="img-thumbnail"]]
1.1	293
3.1	294	== Annunciator Flags ==
1.1	295
	296	Some state flags could be used as outputs for external diagnosis (called annunciation) when certain applied instructions are used.
	297
	298	(% style="text-align:center" %)
3.1	299	[[image:1650087434137-885.png\|\|height="84" width="400" class="img-thumbnail"]]
1.1	300
	301	If X1 and X2 set ON at the same time and keep more than 1 seconds, S900 is activated, if X1 or X2 is turned OFF after the activation of S900, the ON state of S900 is self-retained. If X1 and X2 set ON at the same time less than 1 seconds, S900 is not activated.
	302
3.1	303	= Timer =
1.1	304
	305	The timer is used to perform the timing function. Each timer contains coils, contacts, and counting time value register. A driven coil sets internal PLC contacts. Various timer resolutions are possible, from 1 to 100ms. If the coil power shuts off (insufficient power), the contacts will restore to their initial states and the value will automatically be cleared. Some timers have the feature of accumulation and power-saving.
	306
	307	Devices numbered in: Decimal, i.e. T0 to T9, T10 to T19.
	308
	309	Table 1
	310
	311	(% class="table-bordered" %)
	312	\|=(% style="width: 162px;" %)PLC\|=(% style="width: 168px;" %)(((
	313	100ms
	314
	315	0.1– 3276.7s
	316	)))\|=(% style="width: 168px;" %)(((
	317	100ms
	318
	319	0.1 – 3276.7s
	320
	321	0.01–327.67s
	322	)))\|=(% style="width: 176px;" %)(((
	323	10ms
	324
	325	0.01-327.67s
	326	)))\|=(% style="width: 184px;" %)(((
	327	Retentive 1ms
	328
	329	0.001-32.767s
	330	)))\|=(% style="width: 224px;" %)(((
	331	Retentive 100ms
	332
	333	0.1–3276.7s
	334	)))
	335	\|(% style="width:162px" %)LX3V (1S Firmware)\|(% style="width:168px" %)(((
	336	32
	337
	338	(T0 – T31)
	339	)))\|(% style="width:168px" %)(((
	340	31
	341
	342	(T32 – T62)
	343	)))\|(% style="width:176px" %)(((
	344	31
	345
	346	(T32 – T62)
	347	)))\|(% style="width:184px" %)(((
	348	1
	349
	350	(T63)
	351	)))\|(% style="width:224px" %)
	352	\|(% rowspan="2" style="width:162px" %)LX3V (2N Firmware)\|(% style="width:168px" %)(((
	353	200
	354
	355	(T0 – T199)
	356	)))\|(% rowspan="2" style="width:168px" %)-\|(% rowspan="2" style="width:176px" %)(((
	357	46
	358
	359	(T200 – T245)
	360	)))\|(% rowspan="2" style="width:184px" %)(((
	361	Interrupted 4
	362
	363	(T246 – T249)
	364	)))\|(% rowspan="2" style="width:224px" %)(((
	365	6
	366
	367	(T250 – T255)
	368	)))
	369	\|(% style="width:168px" %)(((
	370	Sub-program 8
	371
	372	(T192–T199)
	373	)))
	374	\|(% rowspan="2" style="width:162px" %)LX3VP\|(% style="width:168px" %)(((
	375	200
	376
	377	(T0 – T199)
	378	)))\|(% rowspan="2" style="width:168px" %)-\|(% rowspan="2" style="width:176px" %)(((
	379	46
	380
	381	(T200 – T245)
	382	)))\|(% rowspan="2" style="width:184px" %)(((
	383	Interrupted 4
	384
	385	(T246 – T249)
	386	)))\|(% rowspan="2" style="width:224px" %)(((
	387	6
	388
	389	(T250 – T255)
	390	)))
	391	\|(% style="width:168px" %)(((
	392	Sub-program 8
	393
	394	(T192–T199)
	395	)))
	396	\|(% rowspan="2" style="width:162px" %)LX3VE\|(% style="width:168px" %)(((
	397	200
	398
	399	(T0 – T199)
	400	)))\|(% rowspan="2" style="width:168px" %)-\|(% rowspan="2" style="width:176px" %)(((
	401	46
	402
	403	(T200 – T245)
	404	)))\|(% rowspan="2" style="width:184px" %)(((
	405	Interrupted 4
	406
	407	(T246 – T249)
	408	)))\|(% rowspan="2" style="width:224px" %)(((
	409	6
	410
	411	(T250 – T255)
	412	)))
	413	\|(% style="width:168px" %)(((
	414	Sub-program 8
	415
	416	(T192–T199)
	417	)))
	418
3.1	419	== General timer (T0~~T245) ==
1.1	420
	421	The timer output contact is activated when the count data reaches the value set by the constant K.
	422
	423	(% style="text-align:center" %)
3.1	424	[[image:1650087703091-787.png\|\|height="133" width="500" class="img-thumbnail"]]
1.1	425
	426	Figure 2
	427
	428	As above picture shows, when X0 is on, T200 counts from zero and accumulates 10ms clock pulses. When the current value is equal to the set value 223, timer output contact is activated; the output contact of the T200 is actuated after its coil is driven by 2.23s.
	429
3.1	430	== Retentive Timers (T246~~T255) ==
1.1	431
	432	(% style="text-align:center" %)
3.1	433	[[image:1650087743260-243.png\|\|height="150" width="500" class="img-thumbnail"]]
1.1	434
	435	Figure 3
	436
	437	As above picture shows, T250 has the ability to retain the currently reached present value even after X1 has been removed. If T1+T2=42s, T250 (open contact) set on. When X2 set ON, timer T250 will be reset.
	438
3.1	439	== Set value ==
1.1	440
	441	The set value of the timer could be determined by constant (K, H) in the program memory and could also be specified indirectly with the contents of the data register (D).
	442
	443	(% style="text-align:center" %)
3.1	444	[[image:1650087806303-500.png\|\|height="176" width="400" class="img-thumbnail"]]
1.1	445
	446	As above program shows, D3 is set value for T10, D3=D0*2.
	447
3.1	448	= Counter =
1.1	449
3.1	450	== Counter ==
1.1	451
	452	Counter performs counting function, it contains coil, contact and count value register. The current value of the counter increases each time coil C0 is turned ON. The output contact is activated when count value reach to preset value.
	453
	454	Counters which are latched are able to retain their status information, even after the PLC has been powered down. This means on re-powering up, the latched counters could immediately resume from where they were at the time of the original PLC power down.
	455
	456	Devices numbered in: Decimal, i.e. C0 to C9, C10 to C19
	457
	458	Table 1
	459
	460	(% class="table-bordered" %)
	461	\|=(% rowspan="2" %)PLC\|=(% colspan="2" %)(((
	462	16bit UP Counters
	463
	464	0 – 32,767
	465	)))\|=(% colspan="2" %)(((
	466	32bit Bi-directional Counters -2,147,483,648 - +2,147483647
	467	)))
	468	\|General\|Latched\|General\|Latched
	469	\|LX1S\|16 (C0 – C15) ※3\|16 (C16 – C31) ※3\|-\|-
	470	\|LX2N\|100 (C0-C99) ※1\|100(C100 – C199) ※2\|20 (C200 – C219) ※1\|15 (C220 – C234) ※2
	471	\|LX3V\|100 (C0-C99) ※1\|100(C100 – C199) ※2\|20 (C200 – C219) ※1\|15 (C220 – C234) ※2
	472
	473	※1, Non-latched area, it could be changed to latched area by parameter setting.
	474
	475	※2, Latched area, it could be changed to non-latched area by parameter setting.
	476
	477	※3, The non-latched or latched feature couldn’t be changed.
	478
3.1	479	=== 16bit up counter ===
1.1	480
	481	16bit counters: 1 to +32,767, as below picture shows, the current value of the counter increases each time coil C0 is turned ON by X2. The output contact is activated when the coil is turned ON for the tenth time.
	482
	483	After this, the counter data remains unchanged when X2 is turned ON. The counter current value is reset to ‘0’ (zero) when the RST instruction is executed by turning ON X1 in the example. The output contact Y0 is also reset at the same time.
	484
	485	(% style="text-align:center" %)
3.1	486	[[image:1650088012596-185.png\|\|height="169" width="500" class="img-thumbnail"]]
1.1	487
	488	Figure 2
	489
3.1	490	=== 32bit bi-directional counter ===
1.1	491
	492	32bit bi-directional counters: -2,147,483,648 to +2,147,483,647. C200- 219 are general, C220- 234 are latched.
	493
	494	The counting direction is designated with special auxiliary relays M8200 to M8234. When the special auxiliary relay is ON, it is decremented; otherwise, it is counting up.
	495
3.1	496	== High speed counter ==
1.1	497
5.1	498	Although counters C235 to C255 (21 points) are all high speed counters, they share the same range of high speed inputs. Therefore, if an input is already being used by a high speed counter, it could not be used for any other high speed counters or for any other purpose, i.e as an interrupt input.
1.1	499
	500	The selection of high speed counters is not free, they are directly dependent on the type of counter required and which inputs are available.
	501
	502	* Available counter types
	503
	504	1. 1 phase with user start/reset: C235 to C240
	505	1. 1 phase with assigned start/reset: C241 to C245
	506	1. 2 phase bi-directional: C246 to C250
	507	1. A/B phase type: C251 to C255
	508
	509	Different types of counters could be used at the same time but their inputs must not coin-cider. Inputs X0 to X7 couldnot be used for more than one counter.
	510
	511	Table 3
	512
	513	(% style="text-align:center" %)
3.1	514	[[image:1650088093463-330.png\|\|height="209" width="1000" class="img-thumbnail"]]
1.1	515
	516	U: up counter input
	517
	518	D: down counter input
	519
	520	R: reset counter (input)
	521
	522	S: start counter (input)
	523
	524	A: A phase counter input
	525
	526	B: B phase counter input
	527
	528	(((
3.1	529	=== 1 phase ===
1.1	530	)))
	531
	532	(% style="text-align:center" %)
3.1	533	[[image:1650088151106-380.png\|\|height="192" width="300" class="img-thumbnail"]]
1.1	534
	535	Figure 4
	536
	537	As above program shows, C244 is 1 phase high speed counter with start, stop and reset functions. From the table, X1~~X6 are for start and reset. C244 start counting when X12 and X6 are turned ON, the counter input terminal is X0, set value for C244 is determined by D0 (D1), so C244 could be reset by X0 or X11.
	538
	539	(((
3.1	540	=== 2 phase ===
1.1	541	)))
	542
	543	(% style="text-align:center" %)
3.1	544	[[image:1650088187166-773.png\|\|height="208" width="500" class="img-thumbnail"]]
1.1	545
	546	Figure 5
	547
	548	C251~~C255 are 2 phase (AB phase) high speed counter. As above (b) picture shows, C251 counts according from X0 (A phase) and X1 (B phase), when X14 is turned ON. C251 is reset when X13 is turned ON.
	549
	550	While A phase is turned ON, if B changes state from OFF to ON, C251 executes up count operation. While A phase is turn ON, if B changes state from ON to OFF, C251 executes down count operation. According to this principle, C251 executes up count operation while machine forward, and C251 executes down count operation while machine reverse. The M8251 monitors the C251's up / down counting status, OFF is for up counting, ON is for down counting.
	551
3.1	552	=== Output Y: high speed pulse output transistor ===
1.1	553
	554	* It supports up to 4 channels, and each channel maximum output frequency is 200K;
	555	* The output frequency could be used for controlling inverter, stepper and servo motors and so on;
	556
3.1	557	=== Input X: one phase ===
1.1	558
	559	* X0, X1 hardware counters (C235, C236, C246), could support 200K pulse input at the same time;
	560	* X0, X1 software counters (C241, C244, C247, C249), could support the input of 100K pulses at the same time;
	561	* The hardware counter could be switched to software counting using HSCS, HSCR, HSZ instructions;
	562	* The last four X points are software counting, which could support the input of 10K pulses at the same time.
	563
3.1	564	=== Input X: A/B phase ===
1.1	565
	566	* X0, X1 hardware counter (C251), can support 100K pulse input;
	567	* X0, X1 software counters (C252, C254) support the simultaneous input of 50K pulses at the same time;
	568	* Hardware counter can be switched to software counter, using HSCS, HSCR, HSZ instructions;
	569	* The remaining X points are counted by software, and each 5K pulse frequency can be input at the same time;
	570	* There are two frequency modes for 2 phase 2 input, one is 2 times, and the other is 4 times, as following table shows, users select mode in D8200;
	571
	572	Table 6
	573
	574	(% class="table-bordered" %)
	575	\|Value in D8200\|Count icon
	576	\|(((
	577	K2
	578
	579	(two times)
	580	)))\|(((
	581	(% style="text-align:center" %)
3.1	582	[[image:1650088281669-717.png\|\|height="153" width="500" class="img-thumbnail"]]
1.1	583	)))
	584	\|(((
	585	K4 or others
	586
	587	(four times)
	588
	589	(default)
	590	)))\|(((
	591	(% style="text-align:center" %)
3.1	592	[[image:1650088272392-475.png\|\|height="149" width="500" class="img-thumbnail"]]
1.1	593	)))
	594
3.1	595	(% class="box infomessage" %)
	596	(((
	597	✎Note:
	598	HSCS, HSCR and HSCZ couldn’t be used with Frequency multiplication
	599	Program example1:
1.1	600	If X0 input pulse number >=800,The Y0 will set ON.
	601	X6 means reset C235.
	602	X7 means reset Y0.
	603	You also could use M register instead of X registers.(M is a auxiliary register
3.1	604	)))
1.1	605
3.1	606	(% class="box infomessage" %)
	607	(((
1.1	608	✎Note: Wecon PLC X input need power DC24V signal.X0 and X1 support upto 200KHZ.X2~-~-~-~--X5 upto 10K.
3.1	609	)))
1.1	610
	611	(% style="text-align:center" %)
3.1	612	[[image:1650088411761-720.png\|\|height="315" width="800" class="img-thumbnail"]]
1.1	613
	614	//Program example2: AB encoder//
	615
	616
	617	(% style="text-align:center" %)
3.1	618	[[image:1650088448077-686.png\|\|height="137" width="850" class="img-thumbnail"]]
1.1	619
	620
	621	(% style="text-align:center" %)
3.1	622	[[image:1650088461137-192.png\|\|height="333" width="700" class="img-thumbnail"]]
1.1	623
	624	(% style="text-align:center" %)
3.1	625	[[image:1650088478181-407.png\|\|height="683" width="850" class="img-thumbnail"]]
1.1	626
3.1	627	= Register D =
1.1	628
	629	Data registers, as the name suggests, store data. The stored data could be interpreted as a numerical value or as a series of bits, being either ON or OFF. A single data register contains 16bits or one word. However, two consecutive data registers could be used to form a 32bit device more commonly known as a double word. If the contents of the data register are being considered numerically then the Most Significouldt Bit (MSB) is used to indicate if the data has a positive or negative bias. As bit devices could only be ON or OFF, 1 or 0 the MSB convention used is, 0 is equal to a positive number and 1 is equal to a negative number.
	630
	631	In WECON LX Series PLC, most data in the instructions are signed numbers. The bit 15 in 16-bit address is sign bit (0 means positive, 1 means negative). The high bit 15 in 32-bit address is sign bit, the data range is -32,768 - +32,767.
	632
	633	Devices numbered in: Decimal, i.e. D0 to D9, D10 to D19
	634
	635	(% class="table-bordered" %)
	636	\|=(% rowspan="2" style="width: 96px;" %)PLC\|=(% rowspan="2" style="width: 108px;" %)General\|=(% rowspan="2" style="width: 119px;" %)Latched\|=(% colspan="2" style="width: 547px;" %)Latched- specific\|=(% rowspan="2" %)System- specific\|=(% rowspan="2" %)Special
	637	\|=(% style="width: 138px;" %)-\|=Files
	638	\|(% style="width:96px" %)LX3V (1S firmware)\|(% style="width:108px" %)(((
	639	128 ※3
	640
	641	(D0-D127)
	642	)))\|(% style="width:119px" %)-\|(% style="width:138px" %)(((
	643	128 ※3
	644
	645	(D128-D255)
	646	)))\|D1000-D2499 could be used for files by parameter setting\|(((
	647	256
	648
	649	(D8000-D8255)
	650	)))\|(((
	651	16
	652
	653	(V0-V7)
	654
	655	(Z0-Z7)
	656	)))
	657	\|(% style="width:96px" %)LX3V (2N firmware)\|(% style="width:108px" %)(((
	658	200※1
	659
	660	(D0-D199)
	661	)))\|(% style="width:119px" %)(((
	662	312※2
	663
	664	(D200-D511)
	665	)))\|(% style="width:138px" %)(((
	666	7488 ※3
	667
	668	(D512-D7999)
	669	)))\|D1000-D7999 could be used for files by parameter setting\|(((
	670	256
	671
	672	(D8000-D8255)
	673	)))\|(((
	674	16 ※3
	675
	676	(V0-V7)
	677
	678	(Z0-Z7)
	679	)))
	680	\|(% style="width:96px" %)LX3VP\|(% style="width:108px" %)(((
	681	200※1
	682
	683	(D0-D199)
	684	)))\|(% style="width:119px" %)(((
	685	312※2
	686
	687	(D200-D511)
	688	)))\|(% style="width:138px" %)(((
	689	7488 ※3
	690
	691	(D512-D7999)
	692	)))\|D1000-D7999 could be used for files by parameter setting\|(((
	693	256
	694
	695	(D8000-D8255)
	696	)))\|(((
	697	16 ※3
	698
	699	(V0-V7)
	700
	701	(Z0-Z7)
	702	)))
	703	\|(% style="width:96px" %)LX3VE\|(% style="width:108px" %)(((
	704	200※1
	705
	706	(D0-D199)
	707	)))\|(% style="width:119px" %)(((
	708	312※2
	709
	710	(D200-D511)
	711	)))\|(% style="width:138px" %)(((
	712	7488 ※3
	713
	714	(D512-D7999)
	715	)))\|D1000-D7999 could be used for files by parameter setting\|(((
	716	256
	717
	718	(D8000-D8255)
	719	)))\|(((
	720	16 ※3
	721
	722	(V0-V7)
	723
	724	(Z0-Z7)
	725	)))
	726	\|(% style="width:96px" %)LX3VM\|(% style="width:108px" %)(((
	727	200※1
	728
	729	(D0-D199)
	730	)))\|(% style="width:119px" %)(((
	731	312※2
	732
	733	(D200-D511)
	734	)))\|(% style="width:138px" %)(((
	735	7488 ※3
	736
	737	(D512-D7999)
	738	)))\|D1000-D7999 could be used for files by parameter setting\|(((
	739	256
	740
	741	(D8000-D8255)
	742	)))\|(((
	743	16 ※3
	744
	745	(V0-V7)
	746
	747	(Z0-Z7)
	748	)))
	749
	750	※1, Non-latched area, it could be changed to latched area by parameter setting.
	751
	752	※2, Latched area, it could be changed to non-latched area by parameter setting.
	753
	754	※3, The non-latched or latched feature couldnot be changed.
	755
3.1	756	== General ==
1.1	757
	758	A single data register contains 16bits or one word. However, two consecutive data registers could be used to form a 32bit device more commonly known as a double word. Data remains the same until the next time it is rewritten. When switch the PLC state (RUN to STOP or STOP to RUN), the data will be erased. If the special auxiliary relay M8033 is ON, the data in general data register will be retained while switch PLC state.
	759
3.1	760	== Latched ==
1.1	761
	762	The data in register will be retained while switch PLC state. The latched register range could be modified by parameters.
	763
3.1	764	== System-special ==
1.1	765
	766	System-special data register D8000 ~~ D8255 are used for controlling and monitoring a variety of work methods and components in PLC, such as battery voltage, scould time, and is the state of action and so on. The default value will be written into those registers while PLC power on.
	767
3.1	768	== Index registers V, Z ==
1.1	769
	770	The index registers are same as common data registers, is 16-bit registers for data reading and writing. There are totally 64 registers, V0-V31, Z0-Z31.
	771
	772	The index registers could be used in combination with other registers or values by application instructions. But they couldnot be used in combination with the basic instructions and step ladder diagram instruction.
	773
3.1	774	== File registers D ==
1.1	775
	776	The file registers start from D1000 to D7999. File registers could be secured in the program memory in units of 500 points. File registers are actually setup in the parameter area of the PLC. For every block of 500 file registers allocated and equivalent block of 500 program steps are lost.
	777
6.1	778	= Register P, I =
1.1	779
	780	Pointers register P is used for entry address of jump program, and identification of sub-program starting address.
	781
	782	Pointer register I is used for identification of interrupted program starting address.
	783
	784	Devices numbered in: Decimal, i.e. P0 to P9, P10 to P19, I0 to I9, I10 to I19.
	785
	786	(% class="table-bordered" %)
	787	\|=(% rowspan="2" %)PLC\|=(% colspan="2" style="width: 255px;" %)Sub-program\|=(% rowspan="2" style="width: 404px;" %)Insert\|=(% rowspan="2" %)Insert counter\|=(% rowspan="2" %)Counter interrupt
	788	\|(% style="width:126px" %)-\|(% style="width:129px" %)Jump to end
	789	\|LX3V (1S)\|(% style="width:126px" %)(((
	790	63
	791
	792	(P0-P62)
	793	)))\|(% style="width:129px" %)(((
	794	1
	795
	796	(P63)
	797	)))\|(% style="width:404px" %)(((
	798	6
	799
	800	I00_(X000), I10_(X001), I20_(X002), I30_(X003), I40_(X004), I50_(X005)
	801	)))\|-\|-
	802	\|LX3V (2N)\|(% style="width:126px" %)(((
	803	127
	804
	805	(P0-P62)
	806
	807	(P64-P127)
	808	)))\|(% style="width:129px" %)(((
	809	1
	810
	811	(P63)
	812	)))\|(% style="width:404px" %)(((
	813	6
	814
	815	I00_(X000), I10_(X001), I20_(X002), I30_(X003), I40_(X004), I50_(X005)
	816	)))\|(((
	817	3
	818
	819	(I6_, I7_, I8_)
	820	)))\|(((
	821	6
	822
	823	(I010, I020, I030, I040, I050, I060)
	824	)))
	825	\|LX3VP\|(% style="width:126px" %)(((
	826	127
	827
	828	(P0-P62)
	829
	830	(P64-P127)
	831	)))\|(% style="width:129px" %)(((
	832	1
	833
	834	(P63)
	835	)))\|(% style="width:404px" %)(((
	836	6
	837
	838	I00_(X000), I10_(X001), I20_(X002), I30_(X003), I40_(X004), I50_(X005)
	839	)))\|(((
	840	3
	841
	842	(I6_, I7_, I8_)
	843	)))\|(((
	844	6
	845
	846	(I010, I020, I030, I040, I050, I060)
	847	)))
	848	\|LX3VE\|(% style="width:126px" %)(((
	849	127
	850
	851	(P0-P62)
	852
	853	(P64-P127)
	854	)))\|(% style="width:129px" %)(((
	855	1
	856
	857	(P63)
	858	)))\|(% style="width:404px" %)(((
	859	6
	860
	861	I00_(X000), I10_(X001), I20_(X002), I30_(X003), I40_(X004), I50_(X005)
	862	)))\|(((
	863	3
	864
	865	(I6_, I7_, I8_)
	866	)))\|(((
	867	6
	868
	869	(I010, I020, I030, I040, I050, I060)
	870	)))
	871	\|LX3VM\|(% style="width:126px" %)(((
	872	127
	873
	874	(P0-P62)
	875
	876	(P64-P127)
	877	)))\|(% style="width:129px" %)(((
	878	1
	879
	880	(P63)
	881	)))\|(% style="width:404px" %)(((
	882	6
	883
	884	I00_(X000), I10_(X001), I20_(X002), I30_(X003), I40_(X004), I50_(X005)
	885	)))\|(((
	886	3
	887
	888	(I6_, I7_, I8_)
	889	)))\|(((
	890	6
	891
	892	(I010, I020, I030, I040, I050, I060)
	893	)))
	894
3.1	895	(% class="box infomessage" %)
	896	(((
	897	✎Note: The input X for interrupt register couldn’t be used for [high speed counter] and [SPD] instruction as the same time.
	898	)))
1.1	899
	900	1. Sub-program pointer
	901
	902	As below demos show, the left one is for conditional jump with [CJ] instruction, the right one is for Sub-program call with [CALL] instruction.
	903
	904	(% style="text-align:center" %)
3.1	905	[[image:1650093462249-520.png\|\|height="399" width="700" class="img-thumbnail"]]
1.1	906
3.1	907	== Interrupt pointer ==
1.1	908
	909	An interrupt pointer and various usage of three, dedicated interrupt applied instructions;
	910
	911	* IRET: interrupt return
	912	* EI: enable interrupt
	913	* DI: disable interrupt
	914
3.1	915	== Usage of interrupt ==
1.1	916
	917	* Input Interrupt: Receive signals from a particular input without being affected by the scould cycle of PLC;
	918	* Timer Interrupt: The interrupt is repeatedly triggered at intervals of the specified time (10ms~~99ms);
	919	* Counter Interrupt: The interrupt is triggered according to the comparison result of the built-in high-speed counter of PLC;
	920
	921	LX Series PLC could support five kinds of contacts for programming, the detailed as the following table shows.
	922
	923	(% class="table-bordered" %)
	924	\|Format\|Description
	925	\|Decimal\|(((
	926	The set value of timer and counter (K is a constant);
	927
	928	The number of Auxiliary Relay(M), Timer(T), Counter(C), Status(S) and so on (the number of registers);
	929
	930	The value and instruction action in the operand, which are applied (K is a constant);
	931	)))
	932	\|Hexadecimal\|As with the decimal, it is applied in the operand and the specific actions in the application instruction.
	933	\|Binary\|Using decimal number or hexadecimal number to design the value of the timer, counter or data register. However, in the internal PLC, these data is dealt with binary numbers. Moreover, when monitoring external devices, these registers will be converted to a decimal number automatically (16 hex could be converted as well).
	934	\|Octal\|It is used for distribute the register number of input relay and output relay. Use the binary values of [0-7, 10-17 ... 70-77, 100-107]. [8, 9] do not exist in the octal.
	935	\|BCD\|Binary-coded decimal (BCD) is a class of binary encodings of decimal numbers where each decimal digit is represented by a fixed number of bits, usually four or eight. Special bit patterns are sometimes used forseven segment display controlling.
	936	\|BIN float\|BIN float is used for calculation in PLC internal.
	937	\|Decimal float\|It is only used for monitoring and improving readability.
	938
3.1	939	= Constant K =
1.1	940
	941	[K] is decimal integer symbol, mainly used for setting the value of the timer or counter or application instruction operand values. The value range in 16-bit is -32,768 – 32,767, the value range in 32-bit is -2, 147,483, 648 – 2, 147, 483, 647.
	942
3.1	943	= Constant H =
1.1	944
	945	[H] is hexadecimal numbers symbol, mainly used for setting the value of application instruction operand value. The value range in 16-bit instruction is 0000-FFFF, the value range in 32-bit instruction is 0000, 0000– FFFF, FFFF.
	946
3.1	947	= Constant E =
1.1	948
	949	[E] is single-precision floating symbol, mainly used for setting the value of application instruction operand value. It is only available in DECMP、DEZCP、DSINH、DCOSH、DTANH、DEBCD、DEBIN、DEADD、DESUB、DEMUL、DEDIV、DEXP、DLOGE、DLOG10、DESQR、DINT、DSIN、DCOS、DTAN、DASIN、DACOS、 DATAN、DRAD、DDEG instructions in LX3VP and LX3VE series. The value range is ±1.175495 E-38～±3.402823 E+38.
	950
	951	(% style="text-align:center" %)
3.1	952	[[image:1650093586748-193.png\|\|height="62" width="500" class="img-thumbnail"]]
1.1	953
3.1	954	= System-special address =
1.1	955
	956	(% class="table-bordered" %)
	957	\|=M\|=(% colspan="2" %)Description\|=LX1S\|=LX2N or later\|=D\|=(% colspan="3" %)Description\|=LX1S\|=LX2N or later\|=
	958	\|(% colspan="11" %)(((
3.1	959	== System operation ==
1.1	960	)))\|
	961
	962	(% class="table-bordered" %)
	963	\|=M8000\|=(% colspan="2" %)RUN monitor, NO contact\|=O\|=O\|=D8000\|=(% colspan="3" %)Watchdog timer\|=O\|=O\|=
	964	\|M8001\|(% colspan="2" %)RUN monitor, NC contact\|O\|O\|D8001\|(% colspan="3" %)(((
	965	PLC type and version
	966
	967	LX3V/3V-A2:250~~
	968
	969	LX3V-A1: 220~~
	970
	971	LX3VP: 251~~
	972
	973	LX2V: 240~~
	974
	975	~** is viewed by D8101
	976	)))\|O\|O\|
	977	\|M8002\|(% colspan="2" %)Initial pulse NO contact\|O\|O\|D8002\|(% colspan="3" %)(((
	978	Memory capacity
	979
	980	0002: 2K steps
	981
	982	0004: 4K steps
	983
	984	0008: 8K step
	985	)))\|O\|O\|
	986	\|M8003\|(% colspan="2" %)Initial pulse NC contact\|O\|O\|D8003\|(% colspan="3" %)Memory type default value is 0x10.\|O\|O\|
	987	\|M8004\|(% colspan="2" %)ON when one or more error flags from the range M8060to M8067 [except M8062]are ON\|O\|O\|D8004\|(% colspan="3" %)Error BCD code of M8060~~M8067, the default value is 0.\|O\|O\|
	988	\|M8005\|(% colspan="2" %)Battery voltage Low\|-\|O\|D8005\|(% colspan="3" %)Battery voltage\|-\|O\|
	989	\|M8006\|(% colspan="2" %)Battery error latch\|-\|O\|D8006\|(% colspan="3" %)The level at which a battery voltage low is detected\|-\|O\|
	990	\|M8007\|(% colspan="2" %)Power loss has occurred more than 5ms, M8007&M8008 are ON\|-\|O\|D8007\|(% colspan="3" %)The number of time a momentary power failure has occurred since power ON.\|-\|O\|
	991	\|M8008\|(% colspan="2" %)Power loss has occurred\|-\|O\|D8008\|(% colspan="3" %)The time period before shutdown when a power failure occurs (default 10ms)\|-\|O\|
	992	\|M8009\|(% colspan="2" %)Power failure of 24V DC service supply\|-\|O\|D8009\|(% colspan="3" %)The device number of module, which affected by 24VDC power failure\|-\|O\|
	993	\|(% colspan="11" %)(((
3.1	994	== Clock Devices ==
1.1	995	)))\|
	996	\|M8010\|(% colspan="2" %)Reserved\|O\|O\|D8010\|(% colspan="3" %)Current operation cycle / scould time in units of 0.1 msec\|O\|O\|
	997	\|M8011\|(% colspan="2" %)Oscillates in 10 msec cycles\|O\|O\|D8011\|(% colspan="3" %)Minimum cycle/ scould time in units of 0.1 msec\|O\|O\|
	998	\|M8012\|(% colspan="2" %)(((
	999	Oscillates in 100 msec
	1000
	1001	cycles
	1002	)))\|O\|O\|D8012\|(% colspan="3" %)Maximum cycle/ scould time inunits of 0.1 msec\|O\|O\|
	1003	\|M8013\|(% colspan="2" %)Oscillates in 1 sec cycles\|O\|O\|D8013\|(% colspan="3" %)Seconds data for use with an RTC (0-59)\|O\|O\|
	1004	\|M8014\|(% colspan="2" %)Oscillates in 1 min cycles\|O\|O\|D8014\|(% colspan="3" %)Minute data for use with anRTC (0-59)\|O\|O\|
	1005	\|M8015\|(% colspan="2" %)When ON - clock stops, ON→OFF restarts clock\|O\|O\|D8015\|(% colspan="3" %)Hour data for use with an RTC (0-23)\|O\|O\|
	1006	\|M8016\|(% colspan="2" %)(((
	1007	When ON D8013 to 19 are frozen for display but clock
	1008
	1009	continues
	1010	)))\|O\|O\|D8016\|(% colspan="3" %)Day data for use with an RTC (1-31)\|O\|O\|
	1011	\|M8017\|(% colspan="2" %)When pulsed ON set RTC to nearest minute\|O\|O\|D8017\|(% colspan="3" %)Month data for use with an RTC (1-12)\|O\|O\|
	1012	\|M8018\|(% colspan="2" %)When ON Real Time Clockis installed\|O\|O\|D8018\|(% colspan="3" %)Year data for use with an RTC (2000-2099)\|O\|O\|
	1013	\|M8019\|(% colspan="2" %)Clock data has been set outof range\|O\|O\|D8019\|(% colspan="3" %)Weekday data for use with an RTC (0-6)\|O\|O\|
	1014	\|(% colspan="11" %)(((
3.1	1015	== Operation Flags ==
1.1	1016	)))\|
	1017	\|M8020\|(% colspan="2" %)Set when the result of anADDor SUBis “0”\|O\|O\|D8020\|(% colspan="3" %)Input filter setting for devicesX000 to X007 default is 10msec, (0-60)\|O\|O\|
	1018	\|M8021\|(% colspan="2" %)(((
	1019	Set when the result of a SUBis less than the
	1020
	1021	min. negative number
	1022	)))\|O\|O\|D8021\|(% colspan="3" %)Reserved\| \| \|
	1023	\|M8022\|(% colspan="2" %)Set when ‘carry’ occurs during an ADD orwhen an overflow occurs asa result of a data shift operation\|O\|O\|D8022\|(% colspan="3" %)Reserved\| \| \|
	1024	\|M8023\|(% colspan="2" %)Reserved\|O\|O\|D8023\|(% colspan="3" %)Reserved\| \| \|
	1025	\|M8024\|(% colspan="2" %)Direction of BMOV\|-\|O\|D8024\|(% colspan="3" %)Reserved\| \| \|
	1026	\|M8025\|(% colspan="2" %)HSC mode\|-\|O\|D8025\|(% colspan="3" %)Reserved\| \| \|
	1027	\|M8026\|(% colspan="2" %)RAMP mode\|-\|O\|D8026\|(% colspan="3" %)Reserved\| \| \|
	1028	\|M8027\|(% colspan="2" %)PR 16 element data string\|-\|O\|D8027\|(% colspan="3" %)Reserved\| \| \|
	1029	\|M8028\|(% colspan="2" %)Switch100ms/10ms timer\|O\|-\|D8028\|(% colspan="3" %)Current value of the Z index register\|O\|O\|
	1030	\|M8029\|(% colspan="2" %)Instruction execution complete such as PLSR\|O\|O\|D8029\|(% colspan="3" %)Current value of the V index register\|O\|O\|
	1031	\|(% colspan="11" %)(((
3.1	1032	== PLC Operation Mode ==
1.1	1033	)))\|
	1034	\|M8030\|(% colspan="2" %)Battery voltage is low but BATT.V LED not lit\|-\|O\|D8030\|(% colspan="3" %)Reserved\| \| \|
	1035	\|M8031\|(% colspan="2" %)Clear all unsaved memory\|O\|O\|D8031\|(% colspan="3" %)Reserved\| \| \|
	1036	\|M8032\|(% colspan="2" %)Clear all the saved memory\|O\|O\|D8032\|(% colspan="3" %)Reserved\| \| \|
	1037	\|M8033\|(% colspan="2" %)The device statuses and settings are retained when thePLC changes from RUN toSTOP and back into RUN\|O\|O\|D8033\|(% colspan="3" %)Reserved\| \| \|
	1038	\|M8034\|(% colspan="2" %)All of the physical switchgear for activating outputs is disabled. However, the program still operates normally.\|O\|O\|D8034\|(% colspan="3" %)Reserved\| \| \|
	1039	\|M8035\|(% colspan="2" %)Forced operation 1\|O\|O\|D8035\|(% colspan="3" %)Reserved\| \| \|
	1040	\|M8036\|(% colspan="2" %)Forced operation 2\|O\|O\|D8036\|(% colspan="3" %)Reserved\| \| \|
	1041	\|M8037\|(% colspan="2" %)Forced stop\|O\|O\|D8037\|(% colspan="3" %)Reserved\| \| \|
	1042	\|M8038\|(% colspan="2" %)Communication parameter setting flag\|O\|O\|D8038\|(% colspan="3" %)Reserved\| \| \|
	1043	\|M8039\|(% colspan="2" %)Constant scould\|O\|O\|D8039\|(% colspan="3" %)Constant scould time, default 0, in units of MS\|O\|O\|
	1044	\|(% colspan="11" %)(((
3.1	1045	== Step Ladder (STL) Flags ==
1.1	1046	)))\|
	1047	\|M8040\|(% colspan="2" %)When ON STL state transfer is disabled\|O\|O\|D8040\|(% colspan="3" rowspan="8" %)Up to 8 active STL states, from the range S0 to S899, are stored in D8040 to D8047 in ascending numerical order (Updated at END)\|O\|O\|
	1048	\|M8041\|(% colspan="2" %)When ON STL transfer from initial state is enabled during automatic operation\|O\|O\|D8041\|O\|O\|
	1049	\|M8042\|(% colspan="2" %)A pulse output is given in response to a start input\|O\|O\|D8042\|O\|O\|
	1050	\|M8043\|(% colspan="2" %)On during the last state of ZERO RETURN mode\|O\|O\|D8043\|O\|O\|
	1051	\|M8044\|(% colspan="2" %)ON when the machine zero is detected\|O\|O\|D8044\|O\|O\|
	1052	\|M8045\|(% colspan="2" %)Disables the all output reset function when the operation mode is changed\|O\|O\|D8045\|O\|O\|
	1053	\|M8046\|(% colspan="2" %)ON when STL monitoring has been enable (M8047)\|O\|O\|D8046\|O\|O\|
	1054	\|M8047\|(% colspan="2" %)When ON D8040 to D8047 are enabled for active STL step monitoring\|O\|O\|D8047\|O\|O\|
	1055	\|M8048\|(% colspan="2" %)ON when annunciator monitoring has been enabled (M8049) and there is an active annunciator flag\|-\|O\|D8048\|(% colspan="3" %)Reserved\| \| \|
	1056	\|M8049\|(% colspan="2" %)When ON D8049 is enabled for actove annunciator state monitoring.\|-\|O\|D8049\|(% colspan="3" %)Stores the lowest currently active annunciator from the range S900 to S999 (Updated at END)\|-\|O\|
	1057	\|(% colspan="11" %)(((
3.1	1058	== Interrupt Control Flags ==
1.1	1059	)))\|
	1060	\|M8050\|(% colspan="2" %)I00□ disabled\|O\|O\|D8050\|(% colspan="3" %)Reserved\| \| \|
	1061	\|M8051\|(% colspan="2" %)I10□ disabled\|O\|O\|D8051\|(% colspan="3" %)Reserved\| \| \|
	1062	\|M8052\|(% colspan="2" %)I20□ disabled\|O\|O\|D8052\|(% colspan="3" %)Reserved\| \| \|
	1063	\|M8053\|(% colspan="2" %)I30□ disabled\|O\|O\|D8053\|(% colspan="3" %)Reserved\| \| \|
	1064	\|M8054\|(% colspan="2" %)I40□ disabled\|O\|O\|D8054\|(% colspan="3" %)Reserved\| \| \|
	1065	\|M8055\|(% colspan="2" %)I50□ disabled\|O\|O\|D8055\|(% colspan="3" %)Reserved\| \| \|
	1066	\|M8056\|(% colspan="2" %)I6□□ disabled\|-\|O\|D8056\|(% colspan="3" %)Reserved\| \| \|
	1067	\|M8057\|(% colspan="2" %)I7□□ disabled\|-\|O\|D8057\|(% colspan="3" %)Reserved\| \| \|
	1068	\|M8058\|(% colspan="2" %)I8□□ disabled\|-\|O\|D8058\|(% colspan="3" %)Reserved\| \| \|
	1069	\|M8059\|(% colspan="2" %)Counters disabled\|-\|O\|D8059\|(% colspan="3" %)Reserved\| \| \|
	1070	\|(% colspan="11" %)(((
3.1	1071	== Error Detection ==
1.1	1072	)))\|
	1073	\|M8060\|(% colspan="2" %)I/O configuration error\|-\|O\|D8060\|(% colspan="3" %)The first I/O number of the unit or block causing the error\|-\|O\|
	1074	\|M8061\|(% colspan="2" %)PLC hardware error\|O\|O\|D8061\|(% colspan="3" %)Error code for hardware error\|O\|O\|
	1075	\|M8062\|(% colspan="2" %)PLC communication error\|-\|O\|D8062\|(% colspan="3" %)Error code for PLC Communications error\|-\|O\|
	1076	\|M8063\|(% colspan="2" %)Parallel link error\|O\|O\|D8063\|(% colspan="3" %)Error code for parallel link error\|O\|O\|
	1077	\|M8064\|(% colspan="2" %)Parameter error\|O\|O\|D8064\|(% colspan="3" %)Error code identifying parameter error\|O\|O\|
	1078	\|M8065\|(% colspan="2" %)Syntax error\|O\|O\|D8065\|(% colspan="3" %)Error code identifying syntax error\|O\|O\|
	1079	\|M8066\|(% colspan="2" %)Loop error\|O\|O\|D8066\|(% colspan="3" %)Error code identifying loop error\|O\|O\|
	1080	\|M8067\|(% colspan="2" %)Operation error\|O\|O\|D8067\|(% colspan="3" %)Error code identifying operation error.\|O\|O\|
	1081	\|M8068\|(% colspan="2" %)Operation error latch\|O\|O\|D8068\|(% colspan="3" %)Operation error step number latched\|O\|O\|
	1082	\|M8069\|(% colspan="2" %)Reserved\| \| \|D8069\|(% colspan="3" %)Step numbers for found errors corresponding to flags M8065 to M8067\|O\|O\|
	1083	\|(% colspan="11" %)(((
3.1	1084	== High-speed ring counter ==
1.1	1085	)))\|
	1086	\|M8099\|(% colspan="2" %)High-speed ring counter operation\|O\|O\|D8099\|(% colspan="3" %)High-speed ring counter, range: 0 to 32,767 in units of 0.1 ms\|O\|O\|
	1087	\|(% colspan="11" %)(((
3.1	1088	== Other functions ==
1.1	1089	)))\|
	1090	\|M8100\|(% colspan="2" %)SPD (X000) pulse/ minute\|O\|O\|D8100\|(% colspan="3" %)Reserved\|O\|O\|
	1091	\|M8101\|(% colspan="2" %)SPD (X001) pulse/ minute\|O\|O\|D8101\|(% colspan="3" %)(((
	1092	Firmware sub-version
	1093
	1094	LX3V/3VP: 160~~
	1095
	1096	LX2V: 240~~
	1097
	1098	The ~~ and D8001~~ combines a complete firmware version number
	1099	)))\|O\|O\|
	1100	\|M8102\|(% colspan="2" %)SPD (X002) pulse/ minute\|O\|O\|D8102\|(% colspan="3" %)User program capacity\|O\|O\|
	1101	\|M8103\|(% colspan="2" %)SPD (X003) pulse/ minute\|O\|O\|D8103\|(% colspan="3" %)Reserved\|O\|O\|
	1102	\|M8104\|(% colspan="2" %)SPD (X004) pulse/ minute\|O\|O\|D8104\|(% colspan="3" %)The AC/DE time for DRVI, DRVA, [100 ms default value] it effected by M8135 (Y0), it must be the same as D8165.\|O\|O\|
	1103	\|M8105\|(% colspan="2" %)SPD (X005) pulse/ minute\|O\|O\|D8105\|(% colspan="3" %)The AC/DE time for DRVI, DRVA, [100 ms default value] it effected by M8135 (Y1), it must be the same as D8166.\|O\|O\|
	1104	\|M8106\|(% colspan="2" %)Reserved\| \| \|D8106\|(% colspan="3" %)The AC/DE time for DRVI, DRVA, [100 ms default value] it effected by M8135 (Y2), it must be the same as D8167.\|O\|O\|
	1105	\|M8107\|(% colspan="2" %)Reserved\| \| \|D8107\|(% colspan="3" %)The AC/DE time for DRVI, DRVA, [100 ms default value] it effected by M8135 (Y3), it must be the same as D8168.\|O\|O\|
	1106	\|M8108\|(% colspan="2" %)Reserved\| \| \|D8108\|(% colspan="3" %)Reserved\| \| \|
	1107	\|M8109\|(% colspan="2" %)Output refresh error\|O\|O\|D8109\|(% colspan="3" %)Output refresh error device number;\|O\|O\|
	1108	\|(% colspan="11" %)(((
3.1	1109	== COM1 communication settings ==
1.1	1110	)))\|
	1111	\|M8110\|(% colspan="2" %)Reserved\| \| \|D8110\|(% colspan="3" %)Com1 port setting (only available in 22319, 24320, 25007 or later)\|O\|O\|
	1112	\|M8111\|(% colspan="2" %)Reserved\| \| \|D8111\|(% colspan="3" %)Reserved\| \| \|
	1113	\|M8112\|(% colspan="2" %)BD module 1 channel 1 flag bit\| \| \|D8112\|(% colspan="3" %)BD module 1 channel 1 data\| \| \|
	1114	\|M8113\|(% colspan="2" %)BD module 1 channel 2 flag bit\| \| \|D8113\|(% colspan="3" %)BD module 1 channel 2 data\| \| \|
	1115	\|M8114\|(% colspan="2" %)BD module 1 channel 3 flag bit\| \| \|D8114\|(% colspan="3" %)BD module 1 channel 3 data\| \| \|
	1116	\|M8115\|(% colspan="2" %)BD module 1 channel 4 flag bit\| \| \|D8115\|(% colspan="3" %)BD module 1 channel 4 data\| \| \|
	1117	\|M8116\|(% colspan="2" %)BD module 2 channel 1 flag bit\| \| \|D8116\|(% colspan="3" %)BD module 2 channel 1 data\| \| \|
	1118	\|M8117\|(% colspan="2" %)BD module 2 channel 2 flag bit\| \| \|D8117\|(% colspan="3" %)BD module 2 channel 2 data\| \| \|
	1119	\|M8118\|(% colspan="2" %)BD module 2 channel 3 flag bit\| \| \|D8118\|(% colspan="3" %)BD module 2 channel 3 data\| \| \|
	1120	\|M8119\|(% colspan="2" %)BD module 2 channel 4 flag bit\| \| \|D8119\|(% colspan="3" %)BD module 2 channel 4 data\| \| \|
	1121	\|(% colspan="11" %)(((
3.1	1122	== COM2 communication settings ==
1.1	1123	)))\|
	1124	\|M8120\|(% colspan="2" %)Reserved\| \| \|D8120\|(% colspan="3" %)Com2 port setting, the default value is 0\|O\|O\|
	1125	\|M8121\|(% colspan="2" %)Sending and waiting (RS instruction)\|O\|O\|D8121\|(% colspan="3" %)Station number settings, the default value is 1\|O\|O\|
	1126	\|M8122\|(% colspan="2" %)(((
	1127	Sending flag (RS instruction)
	1128
	1129	Instruction execution status (MODBUS)
	1130	)))\|O\|O\|D8122\|(% colspan="3" %)Amount of remaining data to be transmitted (Only for RS instruction) unit:0.1ms\|O\|O\|
	1131	\|M8123\|(% colspan="2" %)(((
	1132	Receiving complete flag (RS)
	1133
	1134	Communication error flag (MODBUS)
	1135	)))\|O\|O\|D8123\|(% colspan="3" %)Amount of data already received (Only to RS instruction)\|O\|O\|
	1136	\|M8124\|(% colspan="2" %)Receiving (only to RS instruction)\|O\|O\|D8124\|(% colspan="3" %)Start character STX (Only to RS instruction)\|O\|O\|
	1137	\|M8125\|(% colspan="2" %)Reserved\| \| \|D8125\|(% colspan="3" %)End character ETX (Only to RS instruction)\|O\|O\|
	1138	\|M8126\|(% colspan="2" %)Reserved\| \| \|D8126\|(% colspan="3" %)Communication protocol setting, the default value is 0\|O\|O\|
	1139	\|M8127\|(% colspan="2" %)Reserved\| \| \|D8127\|(% colspan="3" %)Starting address for PC protocol\|O\|O\|
	1140	\|M8128\|(% colspan="2" %)Reserved\| \| \|D8128\|(% colspan="3" %)Data length for PC protocol\|O\|O\|
	1141	\|M8129\|(% colspan="2" %)Timeout judgement\|O\|O\|D8129\|(% colspan="3" %)Timeout judgement, default value is 10 (100ms)\|O\|O\|
	1142	\|(% colspan="11" %)(((
3.1	1143	== High speed & Position ==
1.1	1144	)))\|
	1145	\|M8130\|(% colspan="2" rowspan="2" %)Selects comparison tables to be used with the HSZ instruction\|O\|O\|D8130\|(% colspan="3" %)Contains the number of the current record being processed in the HSZ comparison table\|O\|O\|
	1146	\|M8131\|O\|O\|D8131\|(% colspan="3" %)HSZ&PLSY speed mode\|O\|O\|
	1147	\|M8132\|(% colspan="2" rowspan="2" %)HSZ&PLSY speed mode\|O\|O\|D8132\|(% rowspan="2" %)HSZ&PLAY speed mode frequency\|(% colspan="2" %)Low\|(% rowspan="2" %)O\|(% rowspan="2" %)O\|
	1148	\|M8133\|O\|O\|D8133\|(% colspan="2" %)-\|
	1149	\|M8134\|(% colspan="2" %)Reserved\| \| \|D8134\|(% rowspan="2" %)HSZ&PLAY speed mode pulses\|(% colspan="2" %)Low\|(% rowspan="2" %)O\|(% rowspan="2" %)O\|
	1150	\|M8135\|(% colspan="2" %)Reserved\| \| \|D8135\|(% colspan="2" %)High\|
	1151	\|M8136\|(% colspan="2" %)Reserved\| \| \|D8136\|(% rowspan="2" %)total output pulse of Y000&Y001\|(% colspan="2" %)Low\|(% rowspan="2" %)O\|(% rowspan="2" %)O\|
	1152	\|M8137\|(% colspan="2" %)Reserved\| \| \|D8137\|(% colspan="2" %)High\|
	1153	\|M8138\|(% colspan="2" %)Reserved\| \| \|D8138\|(% colspan="3" %)Reserved\| \| \|
	1154	\|M8139\|(% colspan="2" %)Reserved\| \| \|D8139\|(% colspan="3" %)Reserved\| \| \|
	1155	\|M8140\|(% colspan="2" %)The CLR signal output function of ZRN is valid\|O\|O\|D8140\|(% rowspan="2" %)Accumulated value of PLSY & PLSR output pulse in Y000\|(% colspan="2" %)Low\|(% rowspan="2" %)O\|(% rowspan="2" %)O\|
	1156	\|M8141\|(% colspan="2" %)Accumulator register of output pulse could latched when turn ON (D8136, D8137, D8140~~D8143, D8150~~D8153)\|O\|O\|D8141\|(% colspan="2" %)High\|
	1157	\|M8142\|(% colspan="2" %)Reserved\| \| \|D8142\|(% rowspan="2" %)Accumulated value of PLSY & PLSR output pulse in Y001\|(% colspan="2" %)Low\|(% rowspan="2" %)O\|(% rowspan="2" %)O\|
	1158	\|M8143\|(% colspan="2" %)Reserved\| \| \|D8143\|(% colspan="2" %)High\|
	1159	\|M8144\|(% colspan="2" %)Reserved\| \| \|D8144\|(% colspan="3" %)Reserved\| \| \|
	1160	\|M8145\|(% colspan="2" %)Stop pulse output in Y000\|O\|O\|D8145\|(% colspan="3" %)Bias speed of DRVI & DRVA\|O\|O\|
	1161	\|M8146\|(% colspan="2" %)Stop pulse output in Y001\|O\|O\|D8146\|(% rowspan="2" %)Highest speed of DRVI & DRVA (default is 100,000)\|(% colspan="2" %)Low\|(% rowspan="2" %)O\|(% rowspan="2" %)O\|
	1162	\|M8147\|(% colspan="2" %)Monitor pulse output in Y000\|O\|O\|D8147\|(% colspan="2" %)High\|
	1163	\|M8148\|(% colspan="2" %)Monitor pulse output in Y001\|O\|O\|D8148\|(% colspan="3" %)ACC/DEC time of DRVI & DRVA (default is 100)\|O\|O\|
	1164	\|M8149\|(% colspan="2" %)Monitor pulse output in Y002\|O\|O\|D8149\|(% colspan="3" %)Reserved\| \| \|
	1165	\|M8150\|(% colspan="2" %)Monitor pulse output in Y003\|O\|O\|D8150\|(% colspan="2" rowspan="2" %)Accumulated value of PLSY & PLSR output pulse in Y002\|Low\|(% rowspan="2" %)O\|(% colspan="2" rowspan="2" %)O
	1166	\|M8151\|(% colspan="2" %)Reserved\| \| \|D8151\|High
	1167	\|M8152\|(% colspan="2" %)Stop pulse output in Y002\|O\|O\|D8152\|(% colspan="2" rowspan="2" %)Accumulated value of PLSY & PLSR output pulse in Y003\|Low\|(% rowspan="2" %)O\|(% colspan="2" rowspan="2" %)O
	1168	\|M8153\|(% colspan="2" %)Stop pulse output in Y003\|O\|O\|D8153\|High
	1169	\|M8154\|(% colspan="2" %)Reserved\| \| \|D8154\|(% colspan="3" %)Reserved\| \| \|
	1170	\|M8155\|(% colspan="2" %)Reserved\| \| \|D8155\|(% colspan="3" %)Reserved\| \| \|
	1171	\|(% colspan="11" %)(((
3.1	1172	== Extend function ==
1.1	1173	)))\|
	1174	\|M8156\|(% colspan="2" %)Reserved\| \| \|D8156\|(% colspan="3" %)Define clear signal in Y0 (ZRN) (default is 5=Y5)\|O\|O\|
	1175	\|M8157\|(% colspan="2" %)Reserved\| \| \|D8157\|(% colspan="3" %)Define clear signal in Y1 (ZRN) (default is 6=Y6)\|O\|O\|
	1176	\|M8158\|(% colspan="2" %)Reserved\| \| \|D8158\|(% colspan="3" %)Define clear signal in Y2 (ZRN) (default is 7=Y7)\|O\|O\|
	1177	\|M8159\|(% colspan="2" %)Reserved\| \| \|D8159\|(% colspan="3" %)Define clear signal in Y3 (ZRN) (default is 8=Y10)\|O\|O\|
	1178	\|M8160\|(% colspan="2" %)SWAP function is XCH\|-\|O\|D8160\|(% colspan="3" %)Define clear signal in Y4 (ZRN) (default is 9=Y11)\|O\|O\|
	1179	\|M8161\|(% colspan="2" %)Bit processing mode of ASC/RS/ASCII/HEX/CCD\|O\|O\|D8161\|(% colspan="3" %)Reserved\| \| \|
	1180	\|M8162\|(% colspan="2" %)High-speed connection in parallel mode\|O\|O\|D8162\|(% colspan="3" %)Reserved\| \| \|
	1181	\|M8163\|(% colspan="2" %)Reserved\| \| \|D8163\|(% colspan="3" %)Reserved\| \| \|
	1182	\|M8164\|(% colspan="2" %)Variable transmission points mode (FROM/TO)\|-\|O\|D8164\|(% colspan="3" %)Special transmission points mode (FROM/TO)\|O\|O\|
	1183	\|M8165\|(% colspan="2" %)Reserved\| \| \|D8165\|(% colspan="3" %)When enable acceleration and deceleration time, ensure the values is the same as D8104's\|O\|O\|
	1184	\|M8166\|(% colspan="2" %)Reserved\| \| \|D8166\|(% colspan="3" %)When enable acceleration and deceleration time, ensure the values is the same as D8105's\|O\|O\|
	1185	\|M8167\|(% colspan="2" %)HEX processing function of SMOV\|-\|O\|D8167\|(% colspan="3" %)When enable acceleration and deceleration time, ensure the values is the same as D8106's\|O\|O\|
	1186	\|M8168\|(% colspan="2" %)HEX processing function of HEY\|-\|O\|D8168\|(% colspan="3" %)When enable acceleration and deceleration time, ensure the values is the same as D8107's\|O\|O\|
	1187	\|M8169\|(% colspan="2" %)Reserved\| \| \|D8169\|(% colspan="3" %)Reserved\| \| \|
	1188	\|(% colspan="5" %)Pulse catch\|(% colspan="6" %)Communication\|
	1189	\|M8170\|(% colspan="2" %)X000 pulse catch\|O\|O\|D8170\|(% colspan="3" %)Reserved\| \| \|
	1190	\|M8171\|(% colspan="2" %)X001 pulse catch\|O\|O\|D8171\|(% colspan="3" %)Reserved\| \| \|
	1191	\|M8172\|(% colspan="2" %)X002 pulse catch\|O\|O\|D8172\|(% colspan="3" %)Reserved\| \| \|
	1192	\|M8173\|(% colspan="2" %)X003 pulse catch\|O\|O\|D8173\|(% colspan="3" %)Station number setting state\|O\|O\|
	1193	\|M8174\|(% colspan="2" %)X004 pulse catch\|O\|O\|D8174\|(% colspan="3" %)Communication sub-station setting state\|O\|O\|
	1194	\|M8175\|(% colspan="2" %)X005 pulse catch\|O\|O\|D8175\|(% colspan="3" %)Refresh range setting state\|O\|O\|
	1195	\|M8176\|(% colspan="2" %)Reserved\| \| \|D8176\|(% colspan="3" %)Station number setting\|O\|O\|
	1196	\|M8177\|(% colspan="2" %)Reserved\| \| \|D8177\|(% colspan="3" %)Communication sub-station setting\|O\|O\|
	1197	\|M8178\|(% colspan="2" %)Reserved\| \| \|D8178\|(% colspan="3" %)Refresh range setting\|O\|O\|
	1198	\|M8179\|(% colspan="2" %)Reserved\| \| \|D8179\|(% colspan="3" %)Retries setting\|O\|O\|
	1199	\|M8180\|(% colspan="2" %)Reserved\| \| \|D8180\|(% colspan="3" %)Timeout setting\|O\|O\|
	1200	\|(% colspan="5" %)Communication\|(% colspan="6" %)Indexed addressing\|
	1201	\|M8181\|(% colspan="2" %)Reserved\| \| \|D8181\|(% colspan="3" %)Reserved\| \| \|
	1202	\|M8182\|(% colspan="2" %)Reserved\| \| \|D8182\|(% colspan="3" %)No.2 bit device/ Content of Z1 device\|O\|O\|
	1203	\|M8183\|(% colspan="2" %)Master transfers data error\|O\|O\|D8183\|(% colspan="3" %)No.3 bit device/ Content of V1 device\|O\|O\|
	1204	\|M8184\|(% colspan="2" %)Slave 1 transfers data error\|O\|O\|D8184\|(% colspan="3" %)No.4 bit device/ Content of Z2 device\|O\|O\|
	1205	\|M8185\|(% colspan="2" %)Slave 2 transfers data error\|O\|O\|D8185\|(% colspan="3" %)No.5 bit device/ Content of V2 device\|O\|O\|
	1206	\|M8186\|(% colspan="2" %)Slave 3 transfers data error\|O\|O\|D8186\|(% colspan="3" %)No.6 bit device/ Content of Z3 device\|O\|O\|
	1207	\|M8187\|(% colspan="2" %)Slave 4 transfers data error\|O\|O\|D8187\|(% colspan="3" %)No.7 bit device/ Content of V3 device\|O\|O\|
	1208	\|M8188\|(% colspan="2" %)Slave 5 transfers data error\|O\|O\|D8188\|(% colspan="3" %)No.8 bit device/ Content of Z4 device\|O\|O\|
	1209	\|M8189\|(% colspan="2" %)Slave 6 transfers data error\|O\|O\|D8189\|(% colspan="3" %)No.9 bit device/ Content of V4 device\|O\|O\|
	1210	\|M8190\|(% colspan="2" %)Slave 7 transfers data error\|O\|O\|D8190\|(% colspan="3" %)No.10 bit device/ Content of Z5 device\|O\|O\|
	1211	\|M8191\|(% colspan="2" %)Data transferring\|O\|O\|D8191\|(% colspan="3" %)No.11 bit device/ Content of V5 device\|O\|O\|
	1212	\|M8192\|(% colspan="2" %)Reserved\| \| \|D8192\|(% colspan="3" %)No.12 bit device/ Content of Z6 device\|O\|O\|
	1213	\|M8193\|(% colspan="2" %)Reserved\| \| \|D8193\|(% colspan="3" %)No.13 bit device/ Content of V6 device\|O\|O\|
	1214	\|M8194\|(% colspan="2" %)Reserved\| \| \|D8194\|(% colspan="3" %)No.14 bit device/ Content of Z7 device\|O\|O\|
	1215	\|M8195\|(% colspan="2" %)Reserved\| \| \|D8195\|(% colspan="3" %)No.15 bit device/ Content of V7 device\|O\|O\|
	1216	\|M8196\|(% colspan="2" %)Reserved\| \| \|D8196\|(% colspan="3" %)Reserved\| \| \|
	1217	\|M8197\|(% colspan="2" %)Reserved\| \| \|D8197\|(% colspan="3" %)Reserved\| \| \|
	1218	\|M8198\|(% colspan="2" %)Reserved\| \| \|D8198\|(% colspan="3" %)Reserved\| \| \|
	1219	\|M8199\|(% colspan="2" %)Reserved\| \| \|D8199\|(% colspan="3" %)Reserved\| \| \|
	1220	\|(% colspan="5" %)Counters states\|(% colspan="6" %)Communication\|
	1221	\|M8200\|(% colspan="2" %)C200 Control\|O\|O\|D8200\|(% colspan="3" %)(((
	1222	Frequency multiplication of C251 device
	1223
	1224	D8200=0: 1 frequency multiplication
	1225
	1226	D8200=1: 2 frequency multiplication
	1227
	1228	D8200=2: 4 frequency multiplication
	1229
	1230	Note: HSCS, HSCR and HSCZ instructions could be used with frequency multiplication simultaneously. And this function is available in V311 or later version
	1231	)))\|O\|O\|
	1232	\|M8201\|(% colspan="2" %)C201 Control\|O\|O\|D8201\|(% colspan="3" %)Reserved\| \| \|
	1233	\|M8202\|(% colspan="2" %)C202 Control\|O\|O\|D8202\|(% colspan="3" %)Reserved\| \| \|
	1234	\|M8203\|(% colspan="2" %)C203 Control\|O\|O\|D8203\|(% colspan="3" %)Reserved\| \| \|
	1235	\|M8204\|(% colspan="2" %)C204 Control\|O\|O\|D8204\|(% colspan="3" %)Reserved\| \| \|
	1236	\|M8205\|(% colspan="2" %)C205 Control\|O\|O\|D8205\|(% colspan="3" %)Reserved\| \| \|
	1237	\|M8206\|(% colspan="2" %)C206 Control\|O\|O\|D8206\|(% colspan="3" %)Reserved\| \| \|
	1238	\|M8207\|(% colspan="2" %)C207 Control\|O\|O\|D8207\|(% colspan="3" %)Reserved\| \| \|
	1239	\|M8208\|(% colspan="2" %)C208 Control\|O\|O\|D8208\|(% colspan="3" %)Reserved\| \| \|
	1240	\|M8209\|(% colspan="2" %)C209 Control\|O\|O\|D8209\|(% colspan="3" %)Reserved\| \| \|
	1241	\|M8210\|(% colspan="2" %)C210 Control\|O\|O\|D8210\|(% colspan="3" %)Reserved\| \| \|
	1242	\|M8211\|(% colspan="2" %)C211 Control\|O\|O\|D8211\|(% colspan="3" %)Reserved\| \| \|
	1243	\|M8212\|(% colspan="2" %)C212 Control\|O\|O\|D8212\|(% colspan="3" %)Reserved\| \| \|
	1244	\|M8213\|(% colspan="2" %)C213 Control\|O\|O\|D8213\|(% colspan="3" %)Reserved\| \| \|
	1245	\|M8214\|(% colspan="2" %)C214 Control\|O\|O\|D8214\|(% colspan="3" %)Reserved\| \| \|
	1246	\|M8215\|(% colspan="2" %)C215 Control\|O\|O\|D8215\|(% colspan="3" %)Reserved\| \| \|
	1247	\|M8216\|(% colspan="2" %)C216 Control\|O\|O\|D8216\|(% colspan="3" %)Reserved\| \| \|
	1248	\|M8217\|(% colspan="2" %)C217 Control\|O\|O\|D8217\|(% colspan="3" %)Reserved\| \| \|
	1249	\|M8218\|(% colspan="2" %)C218 Control\|O\|O\|D8218\|(% colspan="3" %)Reserved\| \| \|
	1250	\|M8219\|(% colspan="2" %)C219 Control\|O\|O\|D8219\|(% colspan="3" %)Reserved\| \| \|
	1251	\|M8220\|(% colspan="2" %)C220 Control\|O\|O\|D8220\|(% colspan="3" %)(((
	1252	D8220=1 to enable the new filtering methods (four points constitute a set of filter). When use new filtering methods, the filter time which set by D8020 is not valid. And before using this filtering methods, users need to set the filtering time for each X terminals (D8221~~D8228), Filter time unit is ms.
	1253
	1254	Note: This filter method only works on CPU IO, the IO in extension module is not invalid.
	1255	)))\|O\|O\|
	1256	\|M8221\|(% colspan="2" %)C221 Control\|O\|O\|D8221\|(% colspan="3" %)(((
	1257	Low bits are for setting filter time of X0~~X3;
	1258
	1259	High bits are for setting filter time of X4~~X7
	1260
	1261	Unit is ms
	1262	)))\|O\|O\|
	1263	\|M8222\|(% colspan="2" %)C222 Control\|O\|O\|D8222\|(% colspan="3" %)(((
	1264	Low bits are for setting filter time of X10~~X13;
	1265
	1266	High bits are for setting filter time of X14~~X17
	1267
	1268	Unit is ms
	1269	)))\|O\|O\|
	1270	\|M8223\|(% colspan="2" %)C223 Control\|O\|O\|D8223\|(% colspan="3" %)(((
	1271	Low bits are for setting filter time of X20~~X23;
	1272
	1273	High bits are for setting filter time of X24~~X27
	1274
	1275	Unit is ms
	1276	)))\|O\|O\|
	1277	\|M8224\|(% colspan="2" %)C224 Control\|O\|O\|D8224\|(% colspan="3" %)(((
	1278	Low bits are for setting filter time of X30~~X33;
	1279
	1280	High bits are for setting filter time of X34~~X37
	1281
	1282	Unit is ms
	1283	)))\|O\|O\|
	1284	\|M8225\|(% colspan="2" %)C225 Control\|O\|O\|D8225\|(% colspan="3" %)(((
	1285	Low bits are for setting filter time of X40~~X43;
	1286
	1287	High bits are for setting filter time of X44~~X47
	1288
	1289	Unit is ms
	1290	)))\|O\|O\|
	1291	\|M8226\|(% colspan="2" %)C226 Control\|O\|O\|D8226\|(% colspan="3" %)(((
	1292	Low bits are for setting filter time of X50~~X53;
	1293
	1294	High bits are for setting filter time of X54~~X57
	1295
	1296	Unit is ms
	1297	)))\|O\|O\|
	1298	\|M8227\|(% colspan="2" %)C227 Control\|O\|O\|D8227\|(% colspan="3" %)(((
	1299	Low bits are for setting filter time of X60~~X63;
	1300
	1301	High bits are for setting filter time of X64~~X67
	1302
	1303	Unit is ms
	1304	)))\|O\|O\|
	1305	\|M8228\|(% colspan="2" %)C228 Control\|O\|O\|D8228\|(% colspan="3" %)(((
	1306	Low bits are for setting filter time of X70~~X73;
	1307
	1308	High bits are for setting filter time of X74~~X77
	1309
	1310	Unit is ms
	1311	)))\|O\|O\|
	1312	\|M8229\|(% colspan="2" %)C229 Control\|O\|O\|D8229\|(% colspan="3" %)Reserved\| \| \|
	1313	\|M8230\|(% colspan="2" %)C230 Control\|O\|O\|D8230\|(% colspan="3" %)Reserved\| \| \|
	1314	\|M8231\|(% colspan="2" %)C231 Control\|O\|O\|D8231\|(% colspan="3" %)Reserved\| \| \|
	1315	\|M8232\|(% colspan="2" %)C232 Control\|O\|O\|D8232\|(% colspan="3" %)Reserved\| \| \|
	1316	\|M8233\|(% colspan="2" %)C233 Control\|O\|O\|D8233\|(% colspan="3" %)Reserved\| \| \|
	1317	\|M8234\|(% colspan="2" %)C234 Control\|O\|O\|D8234\|(% colspan="3" %)Reserved\| \| \|
	1318	\|M8235\|(% rowspan="11" %)One phase one directional\|C235 Control\|O\|O\|D8235\|(% colspan="3" %)Reserved\| \| \|
	1319	\|M8236\|C236 Control\|O\|O\|D8236\|(% colspan="3" %)Reserved\| \| \|
	1320	\|M8237\|C237 Control\|O\|O\|D8237\|(% colspan="3" %)Reserved\| \| \|
	1321	\|M8238\|C238 Control\|O\|O\|D8238\|(% colspan="3" %)Reserved\| \| \|
	1322	\|M8239\|C239 Control\|O\|O\|D8239\|(% colspan="3" %)Reserved\| \| \|
	1323	\|M8240\|C240 Control\|O\|O\|D8240\|(% colspan="3" %)Reserved\| \| \|
	1324	\|M8241\|C241 Control\|O\|O\|D8241\|(% colspan="3" %)Reserved\| \| \|
	1325	\|M8242\|C242 Control\|O\|O\|D8242\|(% colspan="3" %)Reserved\| \| \|
	1326	\|M8243\|C243 Control\|O\|O\|D8243\|(% colspan="3" %)Reserved\| \| \|
	1327	\|M8244\|C244 Control\|O\|O\|D8244\|(% colspan="3" %)Reserved\| \| \|
	1328	\|M8245\|C245 Control\|O\|O\|D8245\|(% colspan="3" %)Reserved\| \| \|
	1329	\|M8246\|(% rowspan="5" %)2 phase bi-directional\|C246 Control\|O\|O\|D8246\|(% colspan="3" %)Reserved\| \| \|
	1330	\|M8247\|C247 Control\|O\|O\|D8247\|(% colspan="3" %)Reserved\| \| \|
	1331	\|M8248\|C248 Control\|O\|O\|D8248\|(% colspan="3" %)Reserved\| \| \|
	1332	\|M8249\|C249 Control\|O\|O\|D8249\|(% colspan="3" %)Reserved\| \| \|
	1333	\|M8250\|C250 Control\|O\|O\|D8250\|(% colspan="3" %)Reserved\| \| \|
	1334	\|M8251\|(% rowspan="5" %)A/B phase\|C251 Control\|O\|O\|D8251\|(% colspan="3" %)Reserved\| \| \|
	1335	\|M8252\|C252 Control\|O\|O\|D8252\|(% colspan="3" %)Reserved\| \| \|
	1336	\|M8253\|C253 Control\|O\|O\|D8253\|(% colspan="3" %)Reserved\| \| \|
	1337	\|M8254\|C254 Control\|O\|O\|D8254\|(% colspan="3" %)Reserved\| \| \|
	1338	\|M8255\|C255 Control\|O\|O\|D8255\|(% colspan="3" %)Reserved\| \| \|

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