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Changes for page 08 High speed process

Last modified by Jett on 2025/10/27 11:06
From version 2.1
edited by Jett
on 2025/10/27 11:03
Change comment: There is no comment for this version
To version 3.1
edited by Jett
on 2025/10/27 11:05
Change comment: There is no comment for this version

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... ... @@ -132,7 +132,7 @@
132 132  
133 133  (% class="box infomessage" %)
134 134  (((
135 -**Note: **There is no limit on the number of HSZ,HSCS AND HSCR created, but only 6 HSZ, HSCS, and HSCR can be active at the same time.
135 +**Note: **There is no limit on the number of DHSZ,DHSCS and DHSCR created, but only 6 DHSZ, DHSCS, and DHSCR can be active at the same time.
136 136  )))
137 137  
138 138  = **6.8.5 DHSCS instruction** =
... ... @@ -172,6 +172,11 @@
172 172  
173 173  LX3V could use interrupt pointers I010 through I060 (6 points) as destination devices (D). This enables interrupt routines to be triggered directly when the value of the specified high speed counter reaches the value in the HSCS instruction. When (D) is between I010~~I060, the subprogram for interrupting 0~~5 in the high-speed counter needs to be initiated.
174 174  
175 +(% class="box infomessage" %)
176 +(((
177 +**Note: **There is no limit on the number of DHSZ,DHSCS and DHSCR created, but only 6 DHSZ, DHSCS, and DHSCR can be active at the same time.
178 +)))
179 +
175 175  = **6.8.6 DHSZ instruction** =
176 176  
177 177  **Instruction description**
... ... @@ -200,7 +200,10 @@
200 200  (% style="text-align:center" %)
201 201  [[image:7-7 High speed process_html_5a7b133dc73dd30f.jpg||height="224" width="500" class="img-thumbnail"]]
202 202  
203 -= **6.8.7 SPD instruction** =
208 +(% class="box infomessage" %)
209 +(((
210 +**Note: **There is no limit on the number of DHSZ,DHSCS and DHSCR created, but only 6 DHSZ, DHSCS, and DHSCR can be active at the same time.
211 +)))
204 204  
205 205  **Instruction description**
206 206