Changes for page 01 Program execution

Last modified by Leo Wei on 2024/12/24 22:42

From 13.10 to 13.11 From 16.1 to 17.1

From version 13.11

edited by Stone Wu
on 2022/09/23 16:05

Change comment: (Autosaved)

To version 16.1

edited by Stone Wu
on 2022/09/23 16:31

Change comment: There is no comment for this version

Raw
Rendered

Summary

Page properties (1 modified, 0 added, 0 removed)

Details

Page properties

Content

@@ -361,7 +361,6 @@
  * During the execution of the interrupt program, when an interrupt cause with a low priority or the same priority occurs.
  ** The interruption cause that occurred is stored, and after the interrupt program in execution ends, the interrupt program corresponding to the stored interruption cause is executed. Even if the same interruption cause occurs multiple times, the interruption cause is stored only once.
--
  (% style="text-align:center" %)
  [[image:1652249673420-476.png||class="img-thumbnail"]]
@@ -419,17 +419,17 @@
  **Timer interrupt**
--1. Timer interrupt description
++Timer interrupt description
--1. Timer interrupt is based on the set time, execute the interrupt program every this time, the minimum time interval can reach 100us.
--1. Up to 100 timer interrupt execution programs can be created.
--1. Each timer interrupt program is independent of each other and does not affect each other.
--1. Each timer interrupt program should be configured with priority. When triggered at the same time, it is executed in the order of priority, but when the priority is the same, it is executed in the order of the established program.
--1. The interrupt execution program is executed only after EI is used in the scanner to allow the interrupt
++* Timer interrupt is based on the set time, execute the interrupt program every this time, the minimum time interval can reach 100us.
++* Up to 100 timer interrupt execution programs can be created.
++* Each timer interrupt program is independent of each other and does not affect each other.
++* Each timer interrupt program should be configured with priority. When triggered at the same time, it is executed in the order of priority, but when the priority is the same, it is executed in the order of the established program.
++* The interrupt execution program is executed only after EI is used in the scanner to allow the interrupt
--      2. Timer interrupt step
++Timer interrupt step
--Project managementðProgramðInterruptðRight click to create. Enter the program name. The program name only supports the combination of English letters, numbers, and underscores, and must start with an English letter. The default is INTx. Click Configure and select Timer Interrupt as the execution type, as shown in the figure below (it can also be configured in "program parameters" in "parameters" in project management).
++* Project managementðProgramðInterruptðRight click to create. Enter the program name. The program name only supports the combination of English letters, numbers, and underscores, and must start with an English letter. The default is INTx. Click Configure and select Timer Interrupt as the execution type, as shown in the figure below (it can also be configured in "program parameters" in "parameters" in project management).
  (% style="text-align:center" %)
  [[image:1-20.png||class="img-thumbnail"]]
@@ -440,34 +440,35 @@
  |(% rowspan="2" %)Timer interrupt|Time|Set the interval time for interrupt triggering|1 to 2147483647 (100us unit)|
  |priority|When multiple interrupts arrive at the same time, the order of priority execution, the smallest value is executed first|0 to 2|0
--1. Write interrupt execution program
++Write interrupt execution program
  (% style="text-align:center" %)
  [[image:1-21.png||class="img-thumbnail"]]
--Double-click the newly created timer interrupt program in the project management to start writing the interrupt execution program. As shown in the figure above, a newly created timer interrupt program is INT0, and the trigger condition is configured to execute the interrupt program every 10ms. If the main program uses EI to enable interrupts, all instruction programs in INT0 will be executed every 10ms, namely D0 It will add 1 to 10ms.
++* Double-click the newly created timer interrupt program in the project management to start writing the interrupt execution program. As shown in the figure above, a newly created timer interrupt program is INT0, and the trigger condition is configured to execute the interrupt program every 10ms. If the main program uses EI to enable interrupts, all instruction programs in INT0 will be executed every 10ms, namely D0 It will add 1 to 10ms.
  (% style="text-align:center" %)
  [[image:1652250294005-455.png||class="img-thumbnail"]]
--**~      3. High-speed counter interrupt**
++**High-speed counter interrupt**
--1. Description of high-speed counter interrupt
++Description of high-speed counter interrupt
--1. The high-speed counter interrupt triggers an interrupt condition after the set value of the high-speed counter HSC0 to HSC7 provided by the PLC and executes the interrupt program.
--1. It can support up to 100 high-speed counter interrupt programs, but the number that can be supported by each channel does not need to be fixed.
--1. When using the high-speed counter interrupt, project must configure the high-speed counter and use the OUT HSC instruction to enable the corresponding counting channel to count before it can be used (see the high-speed counter description section for the specific configuration method).
--1. Each high-speed counter interrupt program should be configured with priority. When triggered at the same time, it will be executed in the order of priority. When the priority is the same, it will be executed in the order of channels HSC0-HSC7. When the channel is also the same, it is executed in order according to the creation promise.
--1. Project must use EI in the scan program to allow interrupts before the interrupt execution program will be executed.
++* The high-speed counter interrupt triggers an interrupt condition after the set value of the high-speed counter HSC0 to HSC7 provided by the PLC and executes the interrupt program.
++* It can support up to 100 high-speed counter interrupt programs, but the number that can be supported by each channel does not need to be fixed.
++* When using the high-speed counter interrupt, project must configure the high-speed counter and use the OUT HSC instruction to enable the corresponding counting channel to count before it can be used (see the high-speed counter description section for the specific configuration method).
++* Each high-speed counter interrupt program should be configured with priority. When triggered at the same time, it will be executed in the order of priority. When the priority is the same, it will be executed in the order of channels HSC0-HSC7. When the channel is also the same, it is executed in order according to the creation promise.
++* Project must use EI in the scan program to allow interrupts before the interrupt execution program will be executed.
--**✎Note: **Both the HSC channel and the external input interrupt channel must use the PLC input point X. It should be noted that it
++(% class="box infomessage" %)
++(((
++**✎Note: **Both the HSC channel and the external input interrupt channel must use the PLC input point X. It should be noted that it cannot be reused during configuration. For details, please refer to the configuration chapter of the high-speed counter.
++)))
--cannot be reused during configuration. For details, please refer to the configuration chapter of the high-speed counter.
++High-speed counter interrupt steps
--1. high-speed counter interrupt step
++* “Project management”ð“Programð“Interrupt”ðRight click to create. Enter the program name. The program name only supports the combination of English letters, numbers, and underscores, and must start with an English letter. The default is INTx. Click Configure, select high-speed interrupt for execution type, as shown in the figure below (it can also be configured in "program parameters" in "parameters" in project management).
--“Project management”ð“Programð“Interrupt”ðRight click to create. Enter the program name. The program name only supports the combination of English letters, numbers, and underscores, and must start with an English letter. The default is INTx. Click Configure, select high-speed interrupt for execution type, as shown in the figure below (it can also be configured in "program parameters" in "parameters" in project management).
--
  (% style="text-align:center" %)
  [[image:1-23.png||class="img-thumbnail"]]
@@ -500,7 +500,7 @@
  |Priority|When multiple interrupts arrive at the same time, the order of priority execution, the smallest value is executed first|0 to 2|0
  |Contact|It is available when selecting high-speed comparison set and high-speed comparison reset. The contact is set or reset immediately after the trigger condition is reached.|Y/M/D.b|
--      3. Description of triggering rules
++ Description of triggering rules
  (% class="table-bordered" %)
  |(% style="width:135px" %)**Mode**|(% style="width:187px" %)**Configuration**|(% style="width:128px" %)**The current value**|(% style="width:324px" %)**Action**
@@ -535,21 +535,22 @@
  The program in INT2 will not be executed
  )))
++(% class="box infomessage" %)
++(((
  **✎Note: **Both HSC channel and external input interrupt channel need to use the INPUT point X, so it should be noted that it cannot be reused in configuration. For details, please refer to the configuration section of high-speed counter.
++)))
--1. Write interrupt execution program
++Write interrupt execution program
  * New interrupt program
++** Create three new interrupt programs under the interrupt of project management, namely HSC0_20000, HSC0_30000, HSC0_40000. Configure the interrupt program in the "program parameters", as shown in the figure below.
--Create three new interrupt programs under the interrupt of project management, namely HSC0_20000, HSC0_30000, HSC0_40000. Configure the interrupt program in the "program parameters", as shown in the figure below.
--
  (% style="text-align:center" %)
  [[image:1-24.png||class="img-thumbnail"]]
  * High-speed counter configuration
++** Configure HSC0 for use in the high-speed counter configuration. After selecting the working mode, click the "Check” button. After the correct configuration box pops up, click Enter.
--Configure HSC0 for use in the high-speed counter configuration. After selecting the working mode, click the "Check” button. After the correct configuration box pops up, click Enter.
--
  (% style="text-align:center" %)
  [[image:1-25.png||class="img-thumbnail"]]
@@ -559,127 +559,119 @@
  Program operation:
--Assuming that the High-speed counter channel 0 has been receiving pulses:
++* Assuming that the High-speed counter channel 0 has been receiving pulses:
++** When the count value of HSC0 accumulates from 0 to 20000, all procedures of HSC0_20000 are executed.
++** When the count value of HSC0 is accumulated from 20000 to 30000, all procedures of HSC0_30000 are executed.
++** When the count value of HSC0 is accumulated from 30000 to 40000, all procedures of HSC0_40000 are executed.
--When the count value of HSC0 accumulates from 0 to 20000, all procedures of HSC0_20000 are executed.
--
--When the count value of HSC0 is accumulated from 20000 to 30000, all procedures of HSC0_30000 are executed.
--
--When the count value of HSC0 is accumulated from 30000 to 40000, all procedures of HSC0_40000 are executed.
--
  **Mask interrupt**
--**~     1. Mask through application instructions**
++Mask through application instructions
--The PLC interrupt is in the shielded state by default when it is powered on, and can only be used after the interrupt is allowed through the EI instruction.
++* The PLC interrupt is in the shielded state by default when it is powered on, and can only be used after the interrupt is allowed through the EI instruction.
++* The interrupt mask instruction DI masks all interrupts without parameters, and masks some priority interrupts with parameters (refer to the program flow instruction DI/EI for details).
--The interrupt mask instruction DI masks all interrupts without parameters, and masks some priority interrupts with parameters (refer to the program flow instruction DI/EI for details).
++Mask through special registers SM and SD
--**~      2. Mask through special registers SM and SD**
--
--1.External input interrupt mask register
--
  (% class="table-bordered" %)
--|(% colspan="4" %)**External input interrupt mask register**
--|**Special register number**|**Type of interrupt**|**Instruction**|**Defaults**
--|SM352|X0 rising edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
--|SM353|X0 falling edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
--|SM354|X1 rising edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
--|SM355|X1 falling edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
--|SM356|X2 rising edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
--|SM357|X2 falling edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
--|SM358|X3 rising edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
--|SM359|X3 falling edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
--|SM360|X4 rising edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
--|SM361|X4 falling edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
--|SM362|X5 rising edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
--|SM363|X5 falling edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
--|SM364|X6 rising edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
--|SM365|X6 falling edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
--|SM366|X7 rising edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
--|SM367|X7 falling edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF
++|=(% colspan="4" %)**External input interrupt mask register**
++|=(% style="width: 266px;" %)**Special register number**|=(% style="width: 308px;" %)**Type of interrupt**|=(% style="width: 390px;" %)**Instruction**|=**Defaults**
++|(% style="width:266px" %)SM352|(% style="width:308px" %)X0 rising edge interrupt|(% style="width:390px" %)ON: shield interrupts; OFF: interrupt allowed|OFF
++|(% style="width:266px" %)SM353|(% style="width:308px" %)X0 falling edge interrupt|(% style="width:390px" %)ON: shield interrupts; OFF: interrupt allowed|OFF
++|(% style="width:266px" %)SM354|(% style="width:308px" %)X1 rising edge interrupt|(% style="width:390px" %)ON: shield interrupts; OFF: interrupt allowed|OFF
++|(% style="width:266px" %)SM355|(% style="width:308px" %)X1 falling edge interrupt|(% style="width:390px" %)ON: shield interrupts; OFF: interrupt allowed|OFF
++|(% style="width:266px" %)SM356|(% style="width:308px" %)X2 rising edge interrupt|(% style="width:390px" %)ON: shield interrupts; OFF: interrupt allowed|OFF
++|(% style="width:266px" %)SM357|(% style="width:308px" %)X2 falling edge interrupt|(% style="width:390px" %)ON: shield interrupts; OFF: interrupt allowed|OFF
++|(% style="width:266px" %)SM358|(% style="width:308px" %)X3 rising edge interrupt|(% style="width:390px" %)ON: shield interrupts; OFF: interrupt allowed|OFF
++|(% style="width:266px" %)SM359|(% style="width:308px" %)X3 falling edge interrupt|(% style="width:390px" %)ON: Shield interrupts; OFF: interrupt allowed|OFF
++|(% style="width:266px" %)SM360|(% style="width:308px" %)X4 rising edge interrupt|(% style="width:390px" %)ON: shield interrupts; OFF: interrupt allowed|OFF
++|(% style="width:266px" %)SM361|(% style="width:308px" %)X4 falling edge interrupt|(% style="width:390px" %)ON: shield interrupts; OFF: interrupt allowed|OFF
++|(% style="width:266px" %)SM362|(% style="width:308px" %)X5 rising edge interrupt|(% style="width:390px" %)ON: shield interrupts; OFF: interrupt allowed|OFF
++|(% style="width:266px" %)SM363|(% style="width:308px" %)X5 falling edge interrupt|(% style="width:390px" %)ON: Shield interrupts; OFF: interrupt allowed|OFF
++|(% style="width:266px" %)SM364|(% style="width:308px" %)X6 rising edge interrupt|(% style="width:390px" %)ON: shield interrupts; OFF: interrupt allowed|OFF
++|(% style="width:266px" %)SM365|(% style="width:308px" %)X6 falling edge interrupt|(% style="width:390px" %)ON: shield interrupts; OFF: interrupt allowed|OFF
++|(% style="width:266px" %)SM366|(% style="width:308px" %)X7 rising edge interrupt|(% style="width:390px" %)ON: shield interrupts; OFF: interrupt allowed|OFF
++|(% style="width:266px" %)SM367|(% style="width:308px" %)X7 falling edge interrupt|(% style="width:390px" %)ON: shield interrupts; OFF: interrupt allowed|OFF
--2. Timer interrupt mask register
--
  (% class="table-bordered" %)
--|(% colspan="4" %)**Timer interrupt mask register**
--|**Special register number**|**Type of interrupt**|**Instruction**|**Default**
--|SD350|1st to 16th timer interrupt|(((
++|=(% colspan="4" %)**Timer interrupt mask register**
++|=**Special register number**|=(% style="width: 311px;" %)**Type of interrupt**|=(% style="width: 391px;" %)**Instruction**|=(% style="width: 110px;" %)**Default**
++|SD350|(% style="width:311px" %)1st to 16th timer interrupt|(% style="width:391px" %)(((
  Each bit can control the mask of an interrupt.
--ON: Mask interrupt OFF: Enable interrupt
--)))|0
--|SD351|17th to 32th timer interrupt|(((
++ON: shield interrupts; OFF: interrupt allowed
++)))|(% style="width:110px" %)0
++|SD351|(% style="width:311px" %)17th to 32th timer interrupt|(% style="width:391px" %)(((
  Each bit can control the mask of an interrupt.
--ON: Mask interrupt OFF: Enable interrupt
--)))|0
--|SD352|33th to 48th timer interrupt|(((
++ON: shield interrupts; OFF: interrupt allowed
++)))|(% style="width:110px" %)0
++|SD352|(% style="width:311px" %)33th to 48th timer interrupt|(% style="width:391px" %)(((
  Each bit can control the mask of an interrupt.
--ON: Mask interrupt OFF: Enable interrupt
--)))|0
--|SD353|49th to 64th timer interrupt|(((
++ON: shield interrupts; OFF: interrupt allowed
++)))|(% style="width:110px" %)0
++|SD353|(% style="width:311px" %)49th to 64th timer interrupt|(% style="width:391px" %)(((
  Each bit can control the mask of an interrupt.
--ON: Mask interrupt OFF: Enable interrupt
--)))|0
--|SD354|65th to 80th timer interrupt|(((
++ON: shield interrupts; OFF: interrupt allowed
++)))|(% style="width:110px" %)0
++|SD354|(% style="width:311px" %)65th to 80th timer interrupt|(% style="width:391px" %)(((
  Each bit can control the mask of an interrupt.
--ON: Mask interrupt OFF: Enable interrupt
--)))|0
--|SD355|81st to 96th timer interrupt|(((
++ON: shield interrupts; OFF: interrupt allowed
++)))|(% style="width:110px" %)0
++|SD355|(% style="width:311px" %)81st to 96th timer interrupt|(% style="width:391px" %)(((
  Each bit can control the mask of an interrupt.
--ON: Mask interrupt OFF: Enable interrupt
--)))|0
--|SD356|97th to 100th timer interrupt|(((
++ON: shield interrupts; OFF: interrupt allowed
++)))|(% style="width:110px" %)0
++|SD356|(% style="width:311px" %)97th to 100th timer interrupt|(% style="width:391px" %)(((
  Each bit can control the mask of an interrupt.
--ON: Mask interrupt OFF: Enable interrupt
--)))|0
++ON: shield interrupts; OFF: interrupt allowed
++)))|(% style="width:110px" %)0
 . high-speed counter interrupt mask register
  (% class="table-bordered" %)
--|(% colspan="4" %)**High-speed counter interrupt mask register**
--|**Special register number**|**Type of interrupt**|**Instruction**|**Default**
--|SD382|1st to 16th high-speed counter interrupt|(((
++|=(% colspan="4" %)**High-speed counter interrupt mask register**
++|=(% style="width: 230px;" %)**Special register number**|=(% style="width: 348px;" %)**Type of interrupt**|=(% style="width: 387px;" %)**Instruction**|=(% style="width: 110px;" %)**Default**
++|(% style="width:230px" %)SD382|(% style="width:348px" %)1st to 16th high-speed counter interrupt|(% style="width:387px" %)(((
  Each bit can control the mask of an interrupt.
--ON: Mask interrupt OFF: Enable interrupt
--)))|0
--|SD383|17th to 32nd high-speed counter interrupt|(((
++ON: shield interrupts; OFF: interrupt allowed
++)))|(% style="width:110px" %)0
++|(% style="width:230px" %)SD383|(% style="width:348px" %)17th to 32nd high-speed counter interrupt|(% style="width:387px" %)(((
  Each bit can control the mask of an interrupt.
--ON: Mask interrupt OFF: Enable interrupt
--)))|0
--|SD384|33th to 48th high-speed counter interrupt|(((
++ON: shield interrupts; OFF: interrupt allowed
++)))|(% style="width:110px" %)0
++|(% style="width:230px" %)SD384|(% style="width:348px" %)33th to 48th high-speed counter interrupt|(% style="width:387px" %)(((
  Each bit can control the mask of an interrupt.
--ON: Mask interrupt OFF: Enable interrupt
--)))|0
--|SD385|49th to 64th high-speed counter interrupt|(((
++ON: shield interrupts; OFF: interrupt allowed
++)))|(% style="width:110px" %)0
++|(% style="width:230px" %)SD385|(% style="width:348px" %)49th to 64th high-speed counter interrupt|(% style="width:387px" %)(((
  Each bit can control the mask of an interrupt.
--ON: Mask interrupt OFF: Enable interrupt
--)))|0
--|SD386|65th to 80th high-speed counter interrupt|(((
++ON: shield interrupts; OFF: interrupt allowed
++)))|(% style="width:110px" %)0
++|(% style="width:230px" %)SD386|(% style="width:348px" %)65th to 80th high-speed counter interrupt|(% style="width:387px" %)(((
  Each bit can control the mask of an interrupt.
--ON: Mask interrupt OFF: Enable interrupt
--)))|0
--|SD387|81st to 96th high-speed counter interrupt|(((
++ON: shield interrupts; OFF: interrupt allowed
++)))|(% style="width:110px" %)0
++|(% style="width:230px" %)SD387|(% style="width:348px" %)81st to 96th high-speed counter interrupt|(% style="width:387px" %)(((
  Each bit can control the mask of an interrupt.
--ON: Mask interrupt OFF: Enable interrupt
--)))|0
--|SD388|97th to 100th high-speed counter interrupt|(((
++ON: shield interrupts; OFF: interrupt allowed
++)))|(% style="width:110px" %)0
++|(% style="width:230px" %)SD388|(% style="width:348px" %)97th to 100th high-speed counter interrupt|(% style="width:387px" %)(((
  Each bit can control the mask of an interrupt.
--ON: Mask interrupt OFF: Enable interrupt
--)))|0
++ON: shield interrupts; OFF: interrupt allowed
++)))|(% style="width:110px" %)0
  == Subroutine ==

Changes for page 01 Program execution

Summary

Details

Navigation

Table of Contents