Changes for page 01 Program execution
Last modified by Leo Wei on 2024/12/24 22:42
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... ... @@ -361,7 +361,6 @@ 361 361 * During the execution of the interrupt program, when an interrupt cause with a low priority or the same priority occurs. 362 362 ** The interruption cause that occurred is stored, and after the interrupt program in execution ends, the interrupt program corresponding to the stored interruption cause is executed. Even if the same interruption cause occurs multiple times, the interruption cause is stored only once. 363 363 364 - 365 365 (% style="text-align:center" %) 366 366 [[image:1652249673420-476.png||class="img-thumbnail"]] 367 367 ... ... @@ -579,7 +579,11 @@ 579 579 |=(% colspan="4" %)**External input interrupt mask register** 580 580 |=**Special register number**|=**Type of interrupt**|=**Instruction**|=**Defaults** 581 581 |SM352|X0 rising edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF 582 -|SM353|X0 falling edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF 581 +|SM353|X0 falling edge interrupt|((( 582 +ON: Ma 583 + 584 +sk interrupt OFF: Enable interrupt 585 +)))|OFF 583 583 |SM354|X1 rising edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF 584 584 |SM355|X1 falling edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF 585 585 |SM356|X2 rising edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF ... ... @@ -596,8 +596,8 @@ 596 596 |SM367|X7 falling edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF 597 597 598 598 (% class="table-bordered" %) 599 -|(% colspan="4" %)**Timer interrupt mask register** 600 -|**Special register number**|**Type of interrupt**|**Instruction**|**Default** 602 +|=(% colspan="4" %)**Timer interrupt mask register** 603 +|=**Special register number**|=**Type of interrupt**|=**Instruction**|=**Default** 601 601 |SD350|1st to 16th timer interrupt|((( 602 602 Each bit can control the mask of an interrupt. 603 603