Changes for page 01 Program execution
Last modified by Jiahao Lai on 2025/07/18 17:39
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... ... @@ -361,6 +361,7 @@ 361 361 * During the execution of the interrupt program, when an interrupt cause with a low priority or the same priority occurs. 362 362 ** The interruption cause that occurred is stored, and after the interrupt program in execution ends, the interrupt program corresponding to the stored interruption cause is executed. Even if the same interruption cause occurs multiple times, the interruption cause is stored only once. 363 363 364 + 364 364 (% style="text-align:center" %) 365 365 [[image:1652249673420-476.png||class="img-thumbnail"]] 366 366 ... ... @@ -578,11 +578,7 @@ 578 578 |=(% colspan="4" %)**External input interrupt mask register** 579 579 |=**Special register number**|=**Type of interrupt**|=**Instruction**|=**Defaults** 580 580 |SM352|X0 rising edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF 581 -|SM353|X0 falling edge interrupt|((( 582 -ON: Ma 583 - 584 -sk interrupt OFF: Enable interrupt 585 -)))|OFF 582 +|SM353|X0 falling edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF 586 586 |SM354|X1 rising edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF 587 587 |SM355|X1 falling edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF 588 588 |SM356|X2 rising edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF ... ... @@ -599,8 +599,8 @@ 599 599 |SM367|X7 falling edge interrupt|ON: Mask interrupt OFF: Enable interrupt|OFF 600 600 601 601 (% class="table-bordered" %) 602 -| =(% colspan="4" %)**Timer interrupt mask register**603 -| =**Special register number**|=**Type of interrupt**|=**Instruction**|=**Default**599 +|(% colspan="4" %)**Timer interrupt mask register** 600 +|**Special register number**|**Type of interrupt**|**Instruction**|**Default** 604 604 |SD350|1st to 16th timer interrupt|((( 605 605 Each bit can control the mask of an interrupt. 606 606