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Wiki source code of LS

Last modified by Theodore Xu on 2023/11/06 10:02
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1 = **XBC serial** =
2
3 **V-Box Settings**
4
5 |**Item**|**Settings**|**Note**
6 |Protocol|LS XBC CNet|
7 |Connection|RS232|
8 |Baud rate|115200|
9 |Data bit|8|
10 |Parity|NONE|
11 |Stop bit|1|
12 |PLC station No.|1|
13
14 **Address List**
15
16 |**Type**|**Device registers**|**HMI registers**|**Format**|**Range**|**Note**
17 |Bit|P|P|P d|0~~2047|
18 |Bit|M|M|M d|0~~2047|
19 |Bit|L|L|L d|0~~11263|
20 |Bit|K|K|K d|0~~16183|
21 |Bit|F|F|F d|0~~2047|
22 |Bit|D|D|D d|0~~32767|
23 |Bit|R|R|R d|0~~32767|
24 |Bit|U|U|U d|0~~4095|
25 |Word|P|P|P d|0~~2047|
26 |Word|M|M|M d|0~~2047|
27 |Word|L|L|L d|0~~11263|
28 |Word|K|K|K d|0~~16183|
29 |Word|F|F|F d|0~~2047|
30 |Word|C|C|C d|0~~2047|
31 |Word|T|T|T d|0~~2047|
32 |Word|D|D|D d|0~~32767|
33 |Word|N|N|N d|0~~21503|
34 |Word|R|R|R d|0~~32767|
35 |Word|U|U|U d|0~~4095|
36 |Word|Z|Z|Z d|0~~127|
37 |Word|S|S|S d|0~~127|
38
39 [[image:xwiki_V-BOX_V-Net_Training_1+Communication_WebHome_c40f4854ecd178d9.png||alt="image-20220831170147-1.png" height="702" width="1674"]]
40
41 **PLC Setting:**
42
43 ①PLC Default Parameters:
44
45 1.[Network Configuration] → [NevPLC [BOSO Internal Cnet]] → [Basic Settings] → [Connection Settings]→[CH1]Type:RS232C;Baud Rate:115200; Station No:1;[Operation mode]CH1: XGT server
46 2.[Advanced Settings]: [Data bit]8, [Stop bit]1,[Parity]NONE→[OK].
47 Note:The serial port parameters should be set depending on field requirements
48
49 (% style="text-align:center" %)
50 [[image:1.3.png]]
51
52 ②PC and PLC connection:
53
54 [Online]→[Connection Settings]→[Settng Options] Manual Settng→[Connection Settngs] →Type:USB→[OK]
55 Please select according to the actual connection between PC and PLC.
56
57 (% style="text-align:center" %)
58 [[image:1.4.png]]
59
60 **Cable Wiring**
61
62 [[image:xwiki_V-BOX_V-Net_Training_1+Communication_WebHome_b0458a3eede1f20.png||alt="image-20220831170306-4.png" height="253" width="106"]] [[image:xwiki_V-BOX_V-Net_Training_1+Communication_WebHome_bf609039f5561065.png||alt="image-20220831170254-3.png" height="170" width="480"]]
63
64 Pin Definition Diagram
65
66 [[image:xwiki_V-BOX_V-Net_Training_1+Communication_WebHome_7b60fa9ec6df34a8.png||alt="image-20220831170215-2.png" height="175" width="358"]]
67
68 == **XGK FEnet Ethernet** ==
69
70 Supported Series: LS XGT series XGK CPU with XGL-EFMT Ethernet module
71
72 **V-Box Settings**
73
74 |**Items**|**Settings**|**Note**
75 |Protocol|LG XGK FEnet(Ethernet)|
76 |Connection|Ethernet|
77 |Port No.|2004|
78
79 **Address List**
80
81 |**Type**|**Register**|**Range**|**Format**|**Note**
82 |(% rowspan="14" %)Word|P|0~~2047|P d|
83 |M|0~~2047|M d|
84 |K|0~~2047|K d|
85 |F|0~~2047|F d|
86 |T|0~~2047|T d|
87 |C|0~~2047|C d|
88 |Z|0~~127|Z d|
89 |S|0~~127|S d|
90 |L|0~~11263|L d|
91 |N|0~~21503|N d|
92 |D|0~~32767|D d|
93 |R|0~~32767|R d|
94 |ZR|0~~65535|ZR d|
95 |UxDD|0~~6331|UxDD nndd|nn: 0~~63, dd: 0~~31
96
97 (% class="box infomessage" %)
98 (((
99 **✎Note:**
100 In addition to the "UxDD" register, the others correspond to the PLC register one by one. UxDD corresponds to U in the PLC;
101 The [UxDD] register, defined in the PLC is Ux.dd, x represents the block, and dd represents 0-31 of each block. There are 64 blocks in the PLC;
102 All bit registers are in the form of bits in word, and the range is the same as the word register;
103 )))
104
105 [[image:xwiki_V-BOX_V-Net_Training_1+Communication_WebHome_1775875b14c2e8e9.png||alt="image-20220831171127-1.png" height="720" width="1671"]]
106
107 **Cable Wiring**
108
109 [[image:https://docs.we-con.com.cn/bin/download/PIStudio/12.PLC%20protocols/WebHome/12.PLC%20Protocol_html_2297240b57346b2a.png?width=401&height=170&rev=1.1||alt="12.可编程逻辑控制器Protocol_html_2297240b57346b2a.png" height="170" width="401"]]