Changes for page 12 PLC Protocol OLD

Last modified by Mora Zhou on 2024/12/05 14:53

From version 143.1
edited by Ben
on 2022/08/30 15:36
Change comment: There is no comment for this version
To version 141.1
edited by Ben
on 2022/08/30 15:35
Change comment: There is no comment for this version

Summary

Details

Page properties
Content
... ... @@ -1996,7 +1996,7 @@
1996 1996  
1997 1997  **4)Cable Wiring**
1998 1998  
1999 -= Create communication with LS** PLC** =
1999 += Create communication with LS** PLC** =
2000 2000  
2001 2001  == **XBG serial protocol** ==
2002 2002  
... ... @@ -2009,57 +2009,6 @@
2009 2009  **4)Cable Wiring**
2010 2010  
2011 2011  
2012 -= **XGK FEnet Ethernet protocol** =
2013 -
2014 -Supported Series: LS XGT series XGK CPU with XGL-EFMT Ethernet module
2015 -
2016 -**HMI Settings**
2017 -
2018 -|**Items**|**Settings**|**Note**
2019 -|Protocol|LG XGK FEnet(Ethernet)|
2020 -|Connection|Ethernet|
2021 -|Port No.|2004|
2022 -
2023 -**Address List**
2024 -
2025 -|**Type**|**Register**|**Range**|**Format**|**Note**
2026 -|(% rowspan="14" %)Word|P|0~~2047|P d|
2027 -|M|0~~2047|M d|
2028 -|K|0~~2047|K d|
2029 -|F|0~~2047|F d|
2030 -|T|0~~2047|T d|
2031 -|C|0~~2047|C d|
2032 -|Z|0~~127|Z d|
2033 -|S|0~~127|S d|
2034 -|L|0~~11263|L d|
2035 -|N|0~~21503|N d|
2036 -|D|0~~32767|D d|
2037 -|R|0~~32767|R d|
2038 -|ZR|0~~65535|ZR d|
2039 -|UxDD|0~~6331|UxDD nndd|nn: 0~~63, dd: 0~~31
2040 -
2041 -**✎Note:**
2042 -
2043 -* In addition to the "UxDD" register, the others correspond to the PLC register one by one. UxDD corresponds to U in the PLC;
2044 -* The [UxDD] register, defined in the PLC is Ux.dd, x represents the block, and dd represents 0-31 of each block. There are 64 blocks in the PLC;
2045 -* All bit registers are in the form of bits in word, and the range is the same as the word register;
2046 -
2047 -**Communication settings in HMI**
2048 -
2049 -Enable HMI Ethernet in [Project Settings];
2050 -
2051 -(% style="text-align:center" %)
2052 -[[image:12.PLC Protocol_html_43b671f18153910d.png||data-xwiki-image-style-alignment="center" height="107" width="405" class="img-thumbnail"]]
2053 -
2054 -Set PLC IP in [Device IP] settings;
2055 -
2056 -(% style="text-align:center" %)
2057 -[[image:12.PLC Protocol_html_a2a19b5003ad4090.png||data-xwiki-image-style-alignment="center" height="189" width="554" class="img-thumbnail"]]
2058 -
2059 -**Cable Wiring**
2060 -
2061 -[[image:https://docs.we-con.com.cn/bin/download/PIStudio/12.PLC%20protocols/WebHome/12.PLC%20Protocol_html_2297240b57346b2a.png?width=401&height=170&rev=1.1||alt="12.可编程逻辑控制器Protocol_html_2297240b57346b2a.png" height="170" width="401"]]
2062 -
2063 2063  = **SHIMADEN** =
2064 2064  
2065 2065  == **FP23** ==
... ... @@ -3012,6 +3012,60 @@
3012 3012  (% style="text-align:center" %)
3013 3013  [[image:12.PLC Protocol_html_2297240b57346b2a.png||data-xwiki-image-style-alignment="center" height="170" width="401" class="img-thumbnail"]]
3014 3014  
2964 += **LG XGK FEnet Ethernet** =
2965 +
2966 +Supported Series: LS XGT series XGK CPU with XGL-EFMT Ethernet module
2967 +
2968 +**HMI Settings**
2969 +
2970 +(% class="table-bordered" %)
2971 +|**Items**|**Settings**|**Note**
2972 +|Protocol|LG XGK FEnet(Ethernet)|
2973 +|Connection|Ethernet|
2974 +|Port No.|2004|
2975 +
2976 +**Address List**
2977 +
2978 +(% class="table-bordered" %)
2979 +|**Type**|**Register**|**Range**|**Format**|**Note**
2980 +|(% rowspan="14" %)Word|P|0~~2047|P d|
2981 +|M|0~~2047|M d|
2982 +|K|0~~2047|K d|
2983 +|F|0~~2047|F d|
2984 +|T|0~~2047|T d|
2985 +|C|0~~2047|C d|
2986 +|Z|0~~127|Z d|
2987 +|S|0~~127|S d|
2988 +|L|0~~11263|L d|
2989 +|N|0~~21503|N d|
2990 +|D|0~~32767|D d|
2991 +|R|0~~32767|R d|
2992 +|ZR|0~~65535|ZR d|
2993 +|UxDD|0~~6331|UxDD nndd|nn: 0~~63, dd: 0~~31
2994 +
2995 +**✎Note:**
2996 +
2997 +* In addition to the "UxDD" register, the others correspond to the PLC register one by one. UxDD corresponds to U in the PLC;
2998 +* The [UxDD] register, defined in the PLC is Ux.dd, x represents the block, and dd represents 0-31 of each block. There are 64 blocks in the PLC;
2999 +* All bit registers are in the form of bits in word, and the range is the same as the word register;
3000 +
3001 +**Communication settings in HMI**
3002 +
3003 +Enable HMI Ethernet in [Project Settings];
3004 +
3005 +(% style="text-align:center" %)
3006 +[[image:12.PLC Protocol_html_43b671f18153910d.png||data-xwiki-image-style-alignment="center" height="107" width="405" class="img-thumbnail"]]
3007 +
3008 +Set PLC IP in [Device IP] settings;
3009 +
3010 +(% style="text-align:center" %)
3011 +[[image:12.PLC Protocol_html_a2a19b5003ad4090.png||data-xwiki-image-style-alignment="center" height="189" width="554" class="img-thumbnail"]]
3012 +
3013 +**Cable Wiring**
3014 +
3015 +[[image:https://docs.we-con.com.cn/bin/download/PIStudio/12.PLC%20protocols/WebHome/12.PLC%20Protocol_html_2297240b57346b2a.png?width=401&height=170&rev=1.1||alt="12.可编程逻辑控制器Protocol_html_2297240b57346b2a.png" height="170" width="401"]]
3016 +
3017 +
3015 3015  = **OpenCAN** =
3016 3016  
3017 3017  OpenCan is based on CAN2.0 standard; OpenCAN protocols that could be configured autonomously to accept and send frames.