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Changes for page 12 PLC Protocol OLD

Last modified by Mora Zhou on 2024/12/05 14:53
From version 145.1
edited by Ben
on 2022/08/30 15:37
Change comment: There is no comment for this version
To version 142.1
edited by Ben
on 2022/08/30 15:35
Change comment: There is no comment for this version

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... ... @@ -1945,6 +1945,9 @@
1945 1945  [[image:https://docs.we-con.com.cn/bin/download/PIStudio/12.PLC%20protocols/WebHome/12.PLC%20Protocol_html_2297240b57346b2a.png?width=401&height=170&rev=1.1||alt="12.PLC Protocol_html_2297240b57346b2a.png" height="170" width="401"]]
1946 1946  
1947 1947  (% class="wikigeneratedid" %)
1948 += =
1949 +
1950 +(% class="wikigeneratedid" %)
1948 1948  = Create communication with XINJE** PLC** =
1949 1949  
1950 1950  == **XC serial protocol** ==
... ... @@ -1993,7 +1993,7 @@
1993 1993  
1994 1994  **4）Cable Wiring**
1995 1995  
1996 -= Create communication with LS** PLC** =
1999 += Create communication with LS** PLC** =
1997 1997  
1998 1998  == **XBG serial protocol** ==
1999 1999  
... ... @@ -2006,57 +2006,6 @@
2006 2006  **4）Cable Wiring**
2007 2007  
2008 2008  
2009 -== **XGK FEnet Ethernet protocol** ==
2010 -
2011 -Supported Series: LS XGT series XGK CPU with XGL-EFMT Ethernet module
2012 -
2013 -**HMI Settings**
2014 -
2015 -|**Items**|**Settings**|**Note**
2016 -|Protocol|LG XGK FEnet(Ethernet)|
2017 -|Connection|Ethernet|
2018 -|Port No.|2004|
2019 -
2020 -**Address List**
2021 -
2022 -|**Type**|**Register**|**Range**|**Format**|**Note**
2023 -|(% rowspan="14" %)Word|P|0~~2047|P d|
2024 -|M|0~~2047|M d|
2025 -|K|0~~2047|K d|
2026 -|F|0~~2047|F d|
2027 -|T|0~~2047|T d|
2028 -|C|0~~2047|C d|
2029 -|Z|0~~127|Z d|
2030 -|S|0~~127|S d|
2031 -|L|0~~11263|L d|
2032 -|N|0~~21503|N d|
2033 -|D|0~~32767|D d|
2034 -|R|0~~32767|R d|
2035 -|ZR|0~~65535|ZR d|
2036 -|UxDD|0~~6331|UxDD nndd|nn: 0~~63, dd: 0~~31
2037 -
2038 -**✎Note:**
2039 -
2040 -* In addition to the "UxDD" register, the others correspond to the PLC register one by one. UxDD corresponds to U in the PLC;
2041 -* The [UxDD] register, defined in the PLC is Ux.dd, x represents the block, and dd represents 0-31 of each block. There are 64 blocks in the PLC;
2042 -* All bit registers are in the form of bits in word, and the range is the same as the word register;
2043 -
2044 -**Communication settings in HMI**
2045 -
2046 -Enable HMI Ethernet in [Project Settings];
2047 -
2048 -(% style="text-align:center" %)
2049 -[[image:12.PLC Protocol_html_43b671f18153910d.png||data-xwiki-image-style-alignment="center" height="107" width="405" class="img-thumbnail"]]
2050 -
2051 -Set PLC IP in [Device IP] settings;
2052 -
2053 -(% style="text-align:center" %)
2054 -[[image:12.PLC Protocol_html_a2a19b5003ad4090.png||data-xwiki-image-style-alignment="center" height="189" width="554" class="img-thumbnail"]]
2055 -
2056 -**Cable Wiring**
2057 -
2058 -[[image:https://docs.we-con.com.cn/bin/download/PIStudio/12.PLC%20protocols/WebHome/12.PLC%20Protocol_html_2297240b57346b2a.png?width=401&height=170&rev=1.1||alt="12.可编程逻辑控制器Protocol_html_2297240b57346b2a.png" height="170" width="401"]]
2059 -
2060 2060  = **SHIMADEN** =
2061 2061  
2062 2062  == **FP23** ==