LS
Version 14.1 by Devin Chen on 2023/09/19 10:13
LS
XGB Serial
HMI Settings
| Item | Settings | Note |
|---|---|---|
| Protocol | LS XGB CPU DRIECT | |
| Connection | RS232 | |
| Baud rate | 115200 | |
| Data bit | 8 | |
| Parity | NONE | |
| Stop bit | 1 | |
| PLC station No. | 1 |
Address List
| Type | Device registers | HMI registers | Format | Range | Note |
|---|---|---|---|---|---|
| Bit | P | P | P DDDD.f | 0~2047 | |
| Bit | M | M | M DDDD.f | 0~2047 | |
| Bit | L | L | L DDDDD.f | 0~11263 | |
| Bit | K | K | K DDDD.f | 0~2559 | |
| Bit | F | F | F DDDD.f | 0~2047 | |
| Bit | S | S | S DDDDD | 0~12799 | |
| Bit | D | D | D DDDDD.f | 0~32767 | |
| Bit | U | U | U FFFF.f | 0~7f31 | |
| Bit | T | T | T DDDD.f | 0~2047 | |
| Bit | C | C | C DDDD.f | 0~2047 | |
| Word | P | P | P DDDD | 0~2047 | |
| Word | M | M | M DDDD | 0~2047 | |
| Word | L | L | L DDDDD | 0~11263 | |
| Word | K | K | K DDDD | 0~2559 | |
| Word | F | F | F DDDD | 0~2047 | |
| Word | C | C | C DDDD | 0~2047 | |
| Word | T | T | T DDDD | 0~2047 | |
| Word | D | D | D DDDDD | 0~32767 | |
| Word | N | N | N DDDDD | 0~21503 | |
| Word | U | U | U FFFF | 0~7f31 | |
| Word | Z | Z | Z DDD | 0~127 | |
| Word | R | R | R DDDDD | 0~32767 | |
| Word | ZR | ZR | Z DDDDD | 0~32767 | |
| Word | TS | TS | TS DDDD | 0~2047 | |
| Word | CS | CS | CS DDDD | 0~2047 | |
| Word | S | S | S DDDDD | 0~12799 |
Configure the communication protocol
Pin Definition Diagram
XBC Serial
HMI Settings
| Item | Settings | Note |
|---|---|---|
| Protocol | LS XBC CNet | |
| Connection | RS232/RS485 | |
| Baud rate | 115200 | |
| Data bit | 8 | |
| Parity | NONE | |
| Stop bit | 1 | |
| PLC station No. | 1 |
Address List
| Type | Device registers | Format | Range | Note |
|---|---|---|---|---|
| Bit | P | P d | 0~2047 | |
| M | M d | 0~2047 | ||
| L | L d | 0~11263 | ||
| K | K d | 0~16183 | ||
| F | F d | 0~2047 | ||
| D | D d | 0~32767 | ||
| R | R d | 0~32767 | ||
| U | U d | 0~4095 | ||
| Word | P | P d | 0~2047 | |
| M | M d | 0~2047 | ||
| L | L d | 0~11263 | ||
| K | K d | 0~16183 | ||
| F | F d | 0~2047 | ||
| C | C d | 0~2047 | ||
| T | T d | 0~2047 | ||
| D | D d | 0~32767 | ||
| N | N d | 0~21503 | ||
| R | R d | 0~32767 | ||
| U | U d | 0~4095 | ||
| Z | Z d | 0~127 | ||
| S | S d | 0~127 |
Configure the communication protocol
Cable Wiring
Pin Definition Diagram
XGK FEnet(Ethernet)
Supported Series: LS XGT series XGK CPU with XGL-EFMT Ethernet module
HMI Settings
| Items | Settings | Note |
| Protocol | LG XGK FEnet(Ethernet) | |
| Connection | Ethernet | |
| Port No. | 2004 |
Address List
| Type | Register | Range | Format | Note |
| Word | P | 0~2047 | P d | |
| M | 0~2047 | M d | ||
| K | 0~2047 | K d | ||
| F | 0~2047 | F d | ||
| T | 0~2047 | T d | ||
| C | 0~2047 | C d | ||
| Z | 0~127 | Z d | ||
| S | 0~127 | S d | ||
| L | 0~11263 | L d | ||
| N | 0~21503 | N d | ||
| D | 0~32767 | D d | ||
| R | 0~32767 | R d | ||
| ZR | 0~65535 | ZR d | ||
| UxDD | 0~6331 | UxDD nndd | nn: 0~63, dd: 0~31 |
✎Note:
- In addition to the "UxDD" register, the others correspond to the PLC register one by one. UxDD corresponds to U in the PLC;
- The [UxDD] register, defined in the PLC is Ux.dd, x represents the block, and dd represents 0-31 of each block. There are 64 blocks in the PLC;
- All bit registers are in the form of bits in word, and the range is the same as the word register;
Communication settings in HMI
Enable HMI Ethernet in [Project Settings];
Set PLC IP in [Device IP] settings;
Cable Wiring
