09 Rotation and shift

Last modified by Leo Wei on 2022/07/28 03:27

6.9.1 ROL instruction

Instruction description

NameFunctionBits(bits)Pulse typeInstruction formatStep
ROLMake 16-bit or 32-bit data shift left16NoROL D n5
ROLP16Yes5
DROL32No7
DROLP32Yes7

The bit pattern of D is rotated n bits to the left on every execution. This instruction is generally used in pulse execution instruction. When the instruction is 32-bit, it occupies the subsequent neighboring address. When the device in D is KnY, KnM or KnS, only K4 (16-bit) and K8 (32-bit) is effective. The status of the last bit rotated is copied to carry flag M8022.

OperandsBit deviceWord device
XYMSKHEKnXKnYKnMKnSTCDVZ
D       
nConstant, n=1~16(16bit);n=1~32(32-bit)

Program example

7-8 Rotation and shift_html_f69c69a9d47310d7.jpg

6.9.2 ROR instruction

Instruction description

NameFunctionBits(bits)Pulse typeInstruction formatStep
RORMake 16-bit or 32-bit data shift right16NoROR D n5
RORP16Yes5
DROR32No7
DRORP32Yes7

The bit pattern of D is rotated n bits to the right on every execution. This instruction is generally used in pulse execution instruction. When the instruction is 32-bit, it occupies the subsequent neighboring address.

When the device in D is KnY, KnM or KnS, only K4 (16-bit) and K8 (32-bit) is effective. The status of the last bit rotated is copied to carry flag M8022.

OperandsBit deviceWord device
XYMSKHEKnXKnYKnMKnSTCDVZ
D       
nConstant, n=1~16(16bit);n=1~32(32-bit)

Program example

7-8 Rotation and shift_html_97c063aafa8965c3.jpg

6.9.3 RCL instruction

Instruction description

NameFunctionBits(bits)Pulse typeInstruction formatStep
RCLMake 16-bit or 32-bit data shift left with carry16NoRCL D n5
RCLP16Yes5
DRCL32No9
DRCLP32Yes9

The contents of the D are rotated left n bit with the carry flag M8022. This instruction is generally used as pulse execution instruction, i.e. use the RCLP or DRCLP. When the instruction is 32bit, it takes 2 sequential addresses.

When D is KnY or KnM or KnS, only K4 (16-bit) and K8 (32-bit) are effective.

OperandsBit deviceWord device
XYMSKHEKnXKnYKnMKnSTCDVZ
D       
nConstant, n=1~16(16bit);n=1~32(32-bit)

Program example

7-8 Rotation and shift_html_23605217c5370874.jpg

6.9.4 RCR instruction

Instruction description

NameFunctionBits(bits)Pulse typeInstruction formatStep
RCRMake 16-bit or 32-bit data shift right with carry16NoRCR D n5
RCRP16Yes5
DRCR32No9
DRCRP32Yes9

The contents of the D are rotated right n bit with the carry flag M8022. This instruction is generally used as pulse execution instruction, i.e. use the RCLP or DRCRP. When the instruction is 32bit, it takes 2 sequential addresses.

When D is KnY or KnM or KnS, only K4 (16-bit) and K8 (32-bit) are effective.

OperandsBit deviceWord device
XYMSKHEKnXKnYKnMKnSTCDVZ
D       
nConstant, n=1~16(16bit);n=1~32(32-bit)

Program example

7-8 Rotation and shift_html_621a62e748d5a543.jpg

6.9.5 SFTL instruction

Instruction description

NameFunctionBits(bits)Pulse typeInstruction formatStep
SFTLBit left shift16NoSFTL S D n1 n27
SFTLP16Yes7

The instruction copies n2 source devices beginning form S to a bit stack of length n1 beginning from D. For every new addition of n2 bits,the existing data within the bit stack is shifted n1 bits to the left. Any bit data moving to a position exceeding the n1 limit is diverted to an overflow area.

This instruction is generally used as pulse instruction, i.e. SFTLP.

OperandsBit deviceWord device
XYMSKHEKnXKnYKnMKnSTCDVZ
S             
D            
n1Constant, n1≤ 1024
n2Constant, n2≤ n1

Program example

7-8 Rotation and shift_html_fdfb19f8e969cf9f.jpg

6.9.6 SFTR instruction

Instruction description

NameFunctionBits(bits)Pulse typeInstruction formatStep
SFTRBit right shift16NoSFTR S D n1 n29
SFTRP16Yes9

The instruction copies n2 source devices beginning form S to a bit stack of length n1 beginning from D. For every new addition of n2 bits, the existing data within the bit stack is shifted n1 bits to the right. Any bit data moving to a position exceeding the n1 limit is diverted to an overflow area.

This instruction is generally used as pulse instruction, i.e. SFTRP.

OperandsBit deviceWord device
XYMSKHEKnXKnYKnMKnSTCDVZ
S             
D            
n1Constant, n1≤ 1024
n2Constant, n2≤ n1

Program example

7-8 Rotation and shift_html_2db8862fde4312df.jpg

6.9.7 WSFL instruction

Instruction description

NameFunctionBits(bits)Pulse typeInstruction formatStep
WSFLWord left shift16NoWSFL S D n1 n29
WSFLP16Yes9

The instruction copies n2 source devices to a word stack of length n1. For each addition of n2 words, the existing data within the word stack is shifted n2 words to the left. Any word data moving to a position exceeding the n1 limit is diverted to an overflow area.

The word shifting operation will occur every time the instruction is processed unless it is modified with either the pulse suffix or a controlled interlock.

OperandsBit deviceWord device
XYMSKHEKnXKnYKnMKnSTCDVZ
S         
D          
n1Constant, n1 ≤ 2048
n2Constant, n2 ≤ n1

Program example

7-8 Rotation and shift_html_bb0b90317653b219.jpg

6.9.8 WSFR instruction

Instruction description

NameFunctionBits(bits)Pulse typeInstruction formatStep
WSFRWord right shift16NoWSFR S D n1 n29
WSFRP16Yes9

The instruction copies n2 source devices to a word stack of length n1. For each addition of n2 words, the existing data within the word stack is shifted n2 words to the right. Any word data moving to a position exceeding the n1 limit is diverted to an overflow area.

OperandsBit deviceWord device
XYMSKHEKnXKnYKnMKnSTCDVZ
S         
D          
n1Constant, n1 ≤ 2048
n2Constant, n2 ≤ n1

Program example

Example 1

7-8 Rotation and shift_html_4113ad4f36c97f4c.jpg

Example 2

When using a Kn type device, users need to specify the same number of bits.

7-8 Rotation and shift_html_5d0aeec735d5390b.jpg

6.9.9 SFRD instruction

Instruction description

NameFunctionBitsPulse typeInstruction formatStep
SFRDShift read (the reading instruction for controlling FIFO data)16NoSFRD S D n7
SFRDP16Yes7

The source device(S) identifies the head address of the FIFO stack. This instruction reads the first piece of data from the FIFO stack (register S+1), moves all of the data within the stack 'up' one position to fill the read area and decrements the contents of FIFO head address(S) by 1. The read data is written to the destination device (D). When the contents of source device (S) are equal to '0'(zero), i.e. the FIFO stack is empty, the flag M8020 is turned ON.

This instruction is generally used as pulse instruction, i.e. SFRDP.

OperandsBit deviceWord device
XYMSKHEKnXKnYKnMKnSTCDVZ
S       
D          
nConstant, n=1~256(16bit);n=1~128(32-bit)

Program example

7-8 Rotation and shift_html_9be7f0c2e71451ff.jpg

While X0 is turned from OFF to ON, this instruction executes operations according to the following orders (D10 content remains unchanged).

  1. The content in D2 is transferred to D20;
  2. D10~D3 move a bit to right;
  3. The Indicator (D1) minus 1;

6.9.10 SFWR instruction

Instruction description

NameFunctionBitsPulse typeInstruction formatStep
SFWRShift write (the writing instruction for controlling FIFO data)16NoSFWR S D n7
SFWRP16Yes7

The contents of source device (S) are written to the FIFO stack. The position of insertion into stack is automatically calculated by the PLC. The destination device (D) is the head address of the FIFO stack. The contents of D identify where the next record will be stored (as an offset from D+1).

This instruction is generally used as pulse instruction, i.e. SFWRP.

OperandsBit deviceWord device
XYMSKHEKnXKnYKnMKnSTCDVZ
S       
D          
nConstant, 2≤n≤2048

Program example

7-8 Rotation and shift_html_6f98d71fd24cc66c.jpg

When X0 is triggered, the contents of D0 are stored in D2, and the contents of D1 become 1. While X0 is turned from OFF to ON, the contents of D0 are stored in D3, and the contents of D1 become 2, and so on. If the contents of Dl exceed n-1, the instruction is not processed and the carry flag M8022 is set to 1