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Wiki source code of 06 High-speed input counter

Version 2.2 by Stone Wu on 2022/06/15 11:42
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1 = **Specifications of high-speed counter** =
2
3 == {{id name="_Toc18374"/}}{{id name="_Toc21629"/}}{{id name="_Toc718"/}}{{id name="_Toc24813"/}}**Types of high-speed counters** ==
4
5 **(1) Single-phase input counter (S/W)**
6
7 The counting method of single-phase input counter (S/W) is as follows:
8
9 (% style="text-align:center" %)
10 [[image:06_html_1e47cfe250daeab9.gif||height="295" width="800" class="img-thumbnail"]]
11
12 **(2) AB phase input counter [1 times frequency]**
13
14 The counting method of AB phase input counter [1 times frequency] is as follows:
15
16 (% class="table-bordered" %)
17 |**Increase/decrease action**|**Timing**
18 |When counting up|Phase A input is ON and phase B input is OFF→ON, the count will increase by 1
19 |When counting down|When the A phase input is ON and the B phase input is ON→OFF, the count will decrease by 1
20
21 When counting up When counting down
22
23 (% style="text-align:center" %)
24 [[image:06_html_ac46591380ef206a.png||height="246" width="600" class="img-thumbnail"]]
25
26
27 (% style="text-align:center" %)
28 [[image:06_html_c364a1bf3d1a365c.png||height="229" width="600" class="img-thumbnail"]]
29
30 **(3) AB phase input counter [2 times frequency]**
31
32 The counting method of 2-phase 2-input counter [2 times frequency] is as follows:
33
34 (% class="table-bordered" %)
35 |**Increase/decrease action**|**Timing**
36 |When counting up|(((
37 When the A phase input is ON and the B phase input is OFF→ON, the count will increase by 1;
38
39 The count will increase by 1 when the phase A input is OFF and the phase B input is ON→OFF.
40 )))
41 |When counting down|(((
42 When A phase input is ON and B phase input is ON→OFF, the count will decrease by 1;
43
44 When phase A input is OFF and phase B input changes from OFF→ON, the count will decrement by 1.
45 )))
46
47 When counting up When counting down
48
49 (% style="text-align:center" %)
50 [[image:06_html_3e8bfd2357550970.png||height="248" width="600" class="img-thumbnail"]]
51
52
53 (% style="text-align:center" %)
54 [[image:06_html_419030bdafb27bdd.png||height="243" width="600" class="img-thumbnail"]]
55
56 **(4) AB phase input counter [4 times frequency]**
57
58 The counting method of 2-phase 2-input counter [4 times frequency] is as follows:
59
60 (% class="table-bordered" %)
61 |**Increase/decrease action**|**Timing**
62 |When counting up|(((
63 When B phase input is OFF and A phase input is OFF→ON, the count will increase by 1;
64
65 When the A phase input is ON and the B phase input is OFF→ON, the count will increase by 1;
66
67 When B phase input is ON and A phase input is ON→OFF, the count will increase by 1;
68
69 The count will increase by 1 when the phase A input is OFF and the phase B input is ON→OFF.
70 )))
71 |When counting down|(((
72 When A phase input is OFF and B phase input is OFF→ON, the count will decrease by 1;
73
74 When B phase input is ON and A phase input is OFF→ON, the count will decrease by 1;
75
76 When A phase input is ON and B phase input is ON→OFF, the count will decrease by 1;
77
78 When Phase B input is OFF and Phase A input is ON→OFF, the count will decrement by 1.
79 )))
80
81 When counting up When counting down
82
83 (% style="text-align:center" %)
84 [[image:06_html_1b2c59f550739e07.png||height="285" width="600"]]
85
86
87 (% style="text-align:center" %)
88 [[image:06_html_418c9dc9a21844f8.png||height="289" width="600" class="img-thumbnail"]]
89
90 == {{id name="_Toc2131"/}}**Highest frequency** ==
91
92 The maximum countable frequency of various high-speed counters is as follows:
93
94 (% class="table-bordered" %)
95 |**Counter type**|**Highest frequency**
96 |Single phase input counter (S/W)|150KHz
97 |AB phase input counter [1 times frequency]|100KHz
98 |AB phase input counter [2 times frequency]|100KHz
99 |AB phase input counter [4 times frequency]|100KHz
100
101 Counting range: -2147483648 to 2147483647, which is a signed 32-bit ring counter.{{id name="_Toc14212"/}}{{id name="_Toc30428"/}}{{id name="_Toc9824"/}}
102
103 == **{{id name="_Toc13801"/}}High-speed counter allocation** ==
104
105 The input soft components of various types of high-speed counters are fixedly allocated, including 8 channels HSC0 to HSC7.
106
107 Each channel can be changed to single-phase input or AB-phase input according to the high-speed counter configuration, but it should be noted that the occupied X point cannot be repeated.
108
109 (% class="table-bordered" %)
110 |**Channel**|**High-speed counter type**|**X0**|**X1**|**X2**|**X3**|**X4**|**X5**|**X6**|**X7**|**X10**|**X11**|**X12**|**X13**|**X14**|**X15**|**X16**|**X17**
111 |(% rowspan="2" %)HSC0|Single phase input (S/W)|A| | | | | | | | | | | | | | |
112 |AB phase input|A|B| | | | | | | | | | | | | |
113 |(% rowspan="2" %)HSC1|Single phase input (S/W)| |A| | | | | | | | | | | | | |
114 |AB phase input| | |A|B| | | | | | | | | | | |
115 |(% rowspan="2" %)HSC2|Single phase input (S/W)| | |A| | | | | | | | | | | | |
116 |AB phase input| | | | |A|B| | | | | | | | | |
117 |(% rowspan="2" %)HSC3|Single phase input (S/W)| | | |A| | | | | | | | | | | |
118 |AB phase input| | | | | | |A|B| | | | | | | |
119 |(% rowspan="2" %)HSC4|Single phase input (S/W)| | | | |A| | | | | | | | | | |
120 |AB phase input| | | | | | | | |A|B| | | | | |
121 |(% rowspan="2" %)HSC5|Single phase input (S/W)| | | | | |A| | | | | | | | | |
122 |AB phase input| | | | | | | | | | |A|B| | | |
123 |(% rowspan="2" %)HSC6|Single phase input (S/W)| | | | | | |A| | | | | | | | |
124 |AB phase input| | | | | | | | | | | | |A|B| |
125 |(% rowspan="2" %)HSC7|Single phase input (S/W)| | | | | | | |A| | | | | | | |
126 |AB phase input| | | | | | | | | | | | | | |A|B
127
128 A: Phase A input B: Phase B input
129
130 **✎Note: **After HSC0 uses the AB phase input, HSC1 can no longer use single-phase input, because HSC0 occupies two points X0 and X1, and if HSC1 wants to use single-phase input, X1 needs to be occupied and conflicts occur. The same is true for other channels.
131
132 == {{id name="_Toc23555"/}}**{{id name="_Toc28139"/}}{{id name="_Toc17886"/}}High-speed counter use steps** ==
133
134 The following describes the steps to use the high-speed counter.
135
136 “Project management” → “Parameter” → “High-speed counter configuration”
137
138 **(1) Screen display**
139
140 (% style="text-align:center" %)
141 [[image:06_html_d777376833bca061.png||class="img-thumbnail"]]
142
143 **(2) Display content**
144
145 (((
146 (% class="table-bordered" %)
147 |(% style="width:166px" %)**Parameter**|(% style="width:191px" %)**Range**|(% style="width:483px" %)**Instruction**|(% style="width:235px" %)**Defaults**
148 |(% style="width:166px" %)Use or not|(% style="width:191px" %)Use/not use|(% style="width:483px" %)Set whether to use the counter.|(% style="width:235px" %)Unused
149 |(% style="width:166px" %)(((
150 Pulse input
151
152 mode
153 )))|(% style="width:191px" %)(((
154 Single phase input
155
156 AB phase input
157 )))|(% style="width:483px" %)Choose to use single phase input or AB phase input|(% style="width:235px" %)Single phase input
158 |(% style="width:166px" %)Counting direction|(% style="width:191px" %)Up counting mode down counting mode|(% style="width:483px" %)Select up/down counting mode, valid only when single-phase input|(% style="width:235px" %)Up counting mode
159 |(% style="width:166px" %)Frequency multiplication|(% style="width:191px" %)(((
160 One times frequency
161
162 two times frequency
163
164 four times frequency
165 )))|(% style="width:483px" %)Select input count multiplier, only valid when AB phase input|(% style="width:235px" %)One times frequency
166 |(% style="width:166px" %)Input frequency test time (ms)|(% style="width:191px" %)1 to 32767(ms)|(% style="width:483px" %)Set how often the input frequency is measured at the interval. The shorter the set time, the less accurate the frequency. The frequency measurement result is output in the special register SD. For details, see the description of the SD high-speed counter in the special register.|(% style="width:235px" %)1000ms
167 |(% style="width:166px" %)Filter time|(% style="width:191px" %)0 to 1700(0.01us)|(% style="width:483px" %)(((
168 Set the X point of this channel as the filter time for high-speed input. The smaller the filter setting, the more accurate the theoretical count, but the anti-interference ability will be reduced (the filter time is only valid for unidirectional input).
169
170 When the input is 0, it is the lowest filter time supported by the system.
171 )))|(% style="width:235px" %)1
172 |(% style="width:166px" %)Highest frequency|(% style="width:191px" %)(((
173 Single phase input: 150K
174
175 AB phase input: 100K
176 )))|(% style="width:483px" %)Display the highest input frequency that each channel can reach, read only|(% style="width:235px" %)
177 |(% style="width:166px" %)Occupy X points|(% style="width:191px" %)-|(% style="width:483px" %)Show which X points are occupied after using the channel, read only|(% style="width:235px" %)
178 |(% style="width:166px" %)Check button|(% style="width:191px" %) |(% style="width:483px" %)Check whether the configured X input point is reused, it is recommended to click check when setting is completed, and then confirm the input|(% style="width:235px" %)
179 |(% style="width:166px" %)Restore to default|(% style="width:191px" %) |(% style="width:483px" %)Restore to the same default settings as above|(% style="width:235px" %)
180 |(% style="width:166px" %)Input (X) description|(% style="width:191px" %) |(% style="width:483px" %)Pop up the description table of all modes of each channel occupying X|(% style="width:235px" %)
181 |(% style="width:166px" %)Confirm input|(% style="width:191px" %) |(% style="width:483px" %)After the configuration is complete, click to confirm the input to save the configuration and take effect|(% style="width:235px" %)
182 )))
183
184 **(3) Configuration example**
185
186 HSC0 to HSC3 are configured as 4 single-phase inputs, and HSC4 to HSC7 are configured as 4 AB phase inputs.
187
188 (% style="text-align:center" %)
189 [[image:06_html_dbe773365667f46e.png||class="img-thumbnail"]]
190
191 Use the OUT HSC instruction in the main program to enable High-speed counter. At this time, as long as there is an external pulse input, the pulse value can be observed in HSC0 to HSC7.
192
193 (% style="text-align:center" %)
194 [[image:06_html_3efdf7c077c62e66.png||class="img-thumbnail"]]
195
196 In the double word composed of special soft components SD403 and SD402, the current input pulse frequency of HSC0 can be monitored. Other channels also have corresponding registers, please refer to the description of special registers for details.
197
198 If the counter need to be stopped, just turn off the OUT HSC instruction.
199
200 = {{id name="_Toc9685"/}}**High-speed counter instructions** =
201
202 == {{id name="_Toc25634"/}}{{id name="_Toc31644"/}}{{id name="_Toc7551"/}}{{id name="_Toc13244"/}}**OUT HSC/High-speed counter switch** ==
203
204 When the operation result before the OUT HSC instruction is ON, the high-speed counter is turned on. At this time, the value of the HSC register records the number of high-speed pulses currently received. If the count value is reached, the corresponding HSC bit register becomes on.
205
206 -[OUT (d) (value)]
207
208 **Content, range and data type**
209
210 (% class="table-bordered" %)
211 |**Parameter**|**Content**|**Range**|**Data type**|**Data type (label)**
212 |(d)|High-speed counter channel|HSC0 to HSC7|Signed BIN 32 bit|ANY32
213 |(value)|High-speed counter setting value|-2147483648 to 2147483647|Signed BIN 32 bit|ANY32
214
215 **Device used**
216
217 (% class="table-bordered" %)
218 |(% rowspan="2" %)**Instruction**|(% rowspan="2" %)**Parameter**|(% colspan="9" %)**Devices**|**Offset modification**|(((
219 **Pulse**
220
221 **extension**
222 )))
223 |**KnX**|**KnY**|**KnM**|**KnS**|**D**|**R**|**SD**|**HSC**|**K**|**[D]**|**XXP**
224 |(% rowspan="2" %)OUT HSC|Parameter 1| | | | | | | |●| | |
225 |Parameter 2|●|●|●|●|●|●|●| |●| |
226
227 **Features**
228
229 To enable or disable high-speed counter counting, please configure the high-speed input channel to use the high-speed counter. For details, refer to the high-speed counter description.
230
231 (% class="table-bordered" %)
232 |**Operation result before instruction**|**Action**|**HSC data register status**|**HSC bit register status**
233 |ON|Turn on High-speed counter|The value is accumulated according to the input pulse|Turn ON when the value reaches the set value, otherwise OFF
234 |OFF|Stop High-speed counter|The value remains the same|State remains unchanged
235
236 **Error code**
237
238 (% class="table-bordered" %)
239 |**Error code**|**Content**
240 |4085H|(value) The read address exceeds the device range
241 |2580H|After the high-speed counter is turned on, but the axis high-speed counter enable is not configured
242
243 **Example**
244
245 HSC0 to HSC3 are configured as 4 single-phase inputs, and HSC4 to HSC7 are configured as 4 AB phase inputs.
246
247 (% style="text-align:center" %)
248 [[image:06_html_2b0022e3367742cb.png||class="img-thumbnail"]]
249
250 Use the OUT HSC instruction in the main program to enable High-speed counter. At this time, as long as there is an external pulse input, the pulse value can be observed in HSC0 to HSC7.
251
252 (% style="text-align:center" %)
253 [[image:06_html_9e4faa3072756308.png||class="img-thumbnail"]]
254
255 In the double word composed of special soft components SD403 and SD402, the current input pulse frequency of HSC0 can be monitored. Other channels also have corresponding registers, please refer to the description of special registers for details.
256
257 When the value of HSC0 is greater than 0, the contact of HSC0 will be set, and the other channels are the same. As shown in the circuit program below, Y0 will be turned on.
258
259 (% style="text-align:center" %)
260 [[image:06_html_341b6c3655d0cf6c.png||class="img-thumbnail"]]
261
262 == **DHSCS/High-speed comparison set** ==
263
264 Comparing the counted value in the high-speed counter with the specified value each time it counts, and then immediately set the bit device instruction.
265
266 -[DHSCS (s1) (s2) (d)]
267
268 **Content, range and data type**
269
270 (% class="table-bordered" %)
271 |**Parameter**|(% style="width:814px" %)**Content**|(% style="width:239px" %)**Range**|(% style="width:195px" %)**Data type**|**Data type (label)**
272 |(s1)|(% style="width:814px" %)The data compared with the current value of the high-speed counter, or the word device number where the data to be compared is stored|(% style="width:239px" %)-2147483648 to +2147483647|(% style="width:195px" %)Signed BIN 32 bit|ANY32
273 |(s2)|(% style="width:814px" %)High-speed counter device|(% style="width:239px" %)HSC0 to HSC7|(% style="width:195px" %)Signed BIN 32 bit|ANY32
274 |(d)|(% style="width:814px" %)Bit device number set (ON) when they match|(% style="width:239px" %) |(% style="width:195px" %)Bit|ANY_BOOL
275
276 **Device used**
277
278 (% class="table-bordered" %)
279 |(% rowspan="2" %)**Instruction**|(% rowspan="2" %)**Parameter**|(% colspan="16" %)**Devices**|**Offset modification**|(((
280 **Pulse**
281
282 **extension**
283 )))
284 |**Y**|**M**|**S**|**SM**|**D.b**|**KnX**|**KnY**|**KnM**|**KnS**|**D**|**R**|**SD**|**LC**|**HSC**|**K**|**H**|**[D]**|**XXP**
285 |(% rowspan="3" %)DHSCS|Parameter 1| | | | | |●|●|●|●|●|●|●|●|●|●|●|●|
286 |Parameter 2| | | | | | | | | | | | | |●| | | |
287 |Parameter 3|●|●|●|●|●| | | | | | | | | | | | |
288
289 **Features**
290
291 • When the current value of the high-speed counter of the channel specified in (s2) becomes the comparison value (s1) (in the case of the comparison value K200, 199→200 and 201→200), regardless of the scan time, the bit device (d) Both will be set (ON). This instruction performs comparison processing after the counting processing of the high-speed counter.
292
293 (% style="text-align:center" %)
294 [[image:06_html_9c2964c41710aa3a.gif||class="img-thumbnail"]]
295
296 • If the device specified in (d) is Y0 to Y20, when (d) is set, Y will be directly mapped to the actual hardware output, regardless of the scan cycle.
297
298 • DHSCS parameter 3 can also use the interrupt function name as a parameter. As shown in the figure below, the interrupt program INT0 will be executed when HSC0 is from (19999→20000) or (20001→20000).
299
300 (% style="text-align:center" %)
301 [[image:06_html_c0f44bbd411e514b.png||class="img-thumbnail"]]
302
303 **✎Note: **
304
305 The high-speed counter interrupt only supports a total of 100 programs, and each DHSCS is also counted in these 100. If it exceeds, an operation error will be reported.
306
307 **Error code**
308
309 (% class="table-bordered" %)
310 |**Error code**|**Content**
311 |4084H|The input device in (s2) exceeds the range of HSC0 to HSC7
312 |4085H|(s1) and (s2) read addresses exceed the device range
313 |4086H|(d) write address exceeds the device range
314 |2406H|The number of high-speed counter interrupts exceeds 100
315 |4F81H|DHSCS,SHSCR and DHSZ runs,but OUT HSC does not program
316
317 **Example**
318
319 To configure the high-speed counter, take HSC0 as an example.
320
321 (% style="text-align:center" %)
322 [[image:06_html_1fc642344648be8.png||class="img-thumbnail"]]
323
324 (% style="text-align:center" %)
325 [[image:06_html_eca12d4c32de1d3e.png||class="img-thumbnail"]]
326
327 In scanning MAIN, use the EI instruction to enable the interrupt, and then use the OUT HSC instruction to turn on the high-speed counter.
328
329 After M0 is turned on, when the value of HSC0 changes from 19999→20000, the INT0 program is executed once, that is, D0 is increased by 1.
330
331 When the value of HSC0 changes from 20000→20001, the INT0 program is not executed, that is, D0 remains at 1.
332
333 When the value of HSC0 changes from 20001→20000, the INT0 program is executed once, that is, D0 is increased by 1, and D0 is 2.
334
335 == **DHSCR/High-speed comparison reset** ==
336
337 Each time it counts, compare the counted value in the high-speed counter with the specified value, and then immediately reset the bit device instruction.
338
339 -[DHSCR (s1) (s2) (d)]
340
341 **Content, range and data type**
342
343 (% class="table-bordered" %)
344 |**Parameter**|(% style="width:812px" %)**Content**|(% style="width:256px" %)**Range**|(% style="width:179px" %)**Data type**|**Data type (label)**
345 |(s1)|(% style="width:812px" %)The data compared with the current value of the high-speed counter, or the word device number where the data to be compared is stored|(% style="width:256px" %)-2147483648 to 2147483647|(% style="width:179px" %)Signed BIN 32 bit|ANY32
346 |(s2)|(% style="width:812px" %)High-speed counter device|(% style="width:256px" %)HSC0 to HSC7|(% style="width:179px" %)Signed BIN 32 bit|ANY32
347 |(d)|(% style="width:812px" %)Bit device number reset (OFF) when they match|(% style="width:256px" %) |(% style="width:179px" %)Bit|ANY_BOOL
348
349 **Device used**
350
351 (% class="table-bordered" %)
352 |(% rowspan="2" %)**Instruction**|(% rowspan="2" %)**Parameter**|(% colspan="16" %)**Devices**|**Offset modification**|(((
353 **Pulse**
354
355 **extension**
356 )))
357 |**Y**|**M**|**S**|**SM**|**D.b**|**KnX**|**KnY**|**KnM**|**KnS**|**D**|**R**|**SD**|**LC**|**HSC**|**K**|**H**|**[D]**|**XXP**
358 |(% rowspan="3" %)DHSCR|Parameter 1| | | | | |●|●|●|●|●|●|●|●|●|●|●|●|
359 |Parameter 2| | | | | | | | | | | | | |●| | | |
360 |Parameter 3|●|●|●|●|●| | | | | | | | | | | | |
361
362 **Features**
363
364 • When the current value of the high-speed counter of the channel specified in (s2) becomes the comparison value (s1) (in the case of the comparison value K200, 199→200 and 201→200), regardless of the scan time, the bit device (d) Both will be reset (OFF). This instruction performs comparison processing after the counting processing of the high-speed counter.
365
366 (% style="text-align:center" %)
367 [[image:06_html_bcd0e12f54a850fd.gif||class="img-thumbnail"]]
368
369 • If the device specified in (d) is Y0 to Y20, when (d) is set, Y will be directly mapped to the actual hardware output, regardless of the scan cycle.
370
371 **✎Note: **
372
373 The high-speed counter interrupt only supports a total of 100 programs, and each DHSCR is also counted in these 100. If it exceeds, an operation error will be reported.
374
375 **Error code**
376
377 (% class="table-bordered" %)
378 |**Error code**|**Content**
379 |4084H|The input device in (s2) exceeds the range of HSC0 to HSC7
380 |4085H|The (s1) and (s2) read addresses exceed the device range
381 |4086H|The (d) write address exceeds the device range
382 |2406H|The number of high-speed counter interrupts exceeds 100
383 |4F81H|DHSCS,SHSCR and DHSZ runs,but OUT HSC does not program.
384
385 **Example**
386
387 To configure the high-speed counter, use HSC0 as an example.
388
389 (% style="text-align:center" %)
390 [[image:06_html_849d9e6d4f401046.png||class="img-thumbnail"]]
391
392 (% style="text-align:center" %)
393 [[image:06_html_f2fae0d743f2329f.png||class="img-thumbnail"]]
394
395 Use the OUT HSC instruction to turn on the high-speed counter while scanning MAIN.
396
397 After M0 is turned on, when the value of HSC0 changes from 99→100, reset Y0 and D0 will increase by 1.
398
399 == **DHSZ/High-speed zone comparison** ==
400
401 The current value of the high-speed counter is compared with two values (bandwidth), and the comparison result is output.
402
403 -[DHSZ (s1) (s2) (s3) (d)]
404
405 **Content, range and data type**
406
407 (% class="table-bordered" %)
408 |**Parameter**|(% style="width:830px" %)**Content**|(% style="width:239px" %)**Range**|(% style="width:156px" %)**Data type**|**Data type (label)**
409 |(s1)|(% style="width:830px" %)The data compared with the current value of the high-speed counter, or the word device number (comparison value 1) where the data to be compared is stored|(% style="width:239px" %)-2147483648 to 2147483647|(% style="width:156px" %)Signed BIN 32 bit|ANY32
410 |(s2)|(% style="width:830px" %)The data compared with the current value of the high-speed counter, or the word device number (comparison value 2) where the data to be compared is stored|(% style="width:239px" %)-2147483648 to 2147483647|(% style="width:156px" %)Signed BIN 32 bit|ANY32
411 |(s2)|(% style="width:830px" %)High-speed counter device|(% style="width:239px" %)HSC0 to HSC7|(% style="width:156px" %)Signed BIN 32 bit|ANY32
412 |(d)|(% style="width:830px" %)The device number of the start bit of the comparison result output in comparison value 1 and comparison value 2|(% style="width:239px" %) |(% style="width:156px" %)Bit|(((
413 ANYBIT_ARRAY
414
415 (number of elements: 3)
416 )))
417
418 **Device used**
419
420 (% class="table-bordered" %)
421 |(% rowspan="2" %)**Instruction**|(% rowspan="2" %)**Parameter**|(% colspan="16" %)**Devices**|**Offset modification**|(((
422 **Pulse**
423
424 **extension**
425 )))
426 |**Y**|**M**|**S**|**SM**|**D.b**|**KnX**|**KnY**|**KnM**|**KnS**|**D**|**R**|**SD**|**LC**|**HSC**|**K**|**H**|**[D]**|**XXP**
427 |(% rowspan="4" %)DHSCZ|Parameter 1| | | | | |●|●|●|●|●|●|●|●|●|●|●|●|
428 |Parameter 2| | | | | |●|●|●|●|●|●|●|●|●|●|●|●|
429 |Parameter 3| | | | | | | | | | | | | |●| | | |
430 |Parameter 4|●|●|●|●|●| | | | | | | | | | | | |
431
432 **Features**
433
434 • Compare the current value of the high-speed counter specified in (s3) with two comparison values (comparison value 1, comparison value 2), regardless of the scan time, (d), (d)+1, (d)+2 One item in will turn ON according to the comparison result (lower, in area, upper).
435
436 (% style="text-align:center" %)
437 [[image:06_html_6a81ab6c39ea0263.gif||class="img-thumbnail"]]
438
439 • If the device specified in (d) is Y0 to Y15, when (d), (d+1), (d+2) are set, Y will be directly mapped to the actual hardware output, not affected by the scan cycle .
440
441 • When setting [Comparison Value 1] and [Comparison Value 2], please ensure that [Comparison Value 1]<[Comparison Value 2]. If the settings are different, an operation error will occur, and the DHSZ instruction will not execute the action.
442
443 **✎Note: **
444
445 The high-speed counter interrupt only supports a total of 100 programs, and each DHSZ is also counted in these 100, and the DHSZ instruction will occupy the space of 2 interrupt programs. If it exceeds, an operation error will be reported.
446
447 The comparison result occupies the unit of 3 consecutive addresses starting with (d). Please be careful not to overlap with other controlled devices. In addition, when specifying the Y device, please set it not to exceed the actual number of Y point outputs.
448
449 **Error code**
450
451 (% class="table-bordered" %)
452 |**Error code**|**Content**
453 |4084H|(s2) The input device exceeds the range of HSC0 to HSC7
454 |4085H|(s1)(s2) The read address exceeds the device range
455 |4086H|(d) The write address exceeds the device range
456 |2406H|The number of high-speed counter interrupts exceeds 100
457 |4F81H|DHSCS,SHSCR and DHSZ runs,but OUT HSC does not program
458
459 **Example**
460
461 To configure the high-speed counter, use HSC0 as an example.
462
463 (% style="text-align:center" %)
464 [[image:06_html_58a6a3ee3a7a5af3.png||class="img-thumbnail"]]
465
466 Scanner
467
468 (% style="text-align:center" %)
469 [[image:06_html_2443a67146d411e4.png||class="img-thumbnail"]]
470
471 Execution results
472
473 (% class="table-bordered" %)
474 |(% rowspan="2" %)**Comparison mode**|(% rowspan="2" %)**Current value of channel 1 (s3)**|(% colspan="3" %)**Change of output contact (Y)**
475 |**Y0**|**Y1**|**Y3**
476 |(% rowspan="3" %)(S1)>(s3)|1000>(s3)|ON|OFF|OFF
477 |999→1000|ON→OFF|OFF→ON|OFF
478 |1000→999|OFF→ON|ON→OFF|OFF
479 |(% rowspan="5" %)(S1)≤(s3)≤(s2)|999→1000|ON→OFF|OFF→ON|OFF
480 |1000→999|OFF→ON|ON→OFF|OFF
481 |1000≤(s3)≤2000|OFF|ON|OFF
482 |2000→2001|OFF|ON→OFF|OFF→ON
483 |2001→2000|OFF|OFF→ON|ON→OFF
484 |(% rowspan="3" %)(S3)>(s2)|2000→2001|OFF|ON→OFF|OFF→ON
485 |2001→2000|OFF|OFF→ON|ON→OFF
486 |(S3)>2000|OFF|OFF|ON