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Wiki source code of 06 High-speed counter

Last modified by Mora Zhou on 2023/11/21 14:33
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1 = **Specifications of high-speed counter** =
2
3 == {{id name="_Toc18374"/}}{{id name="_Toc21629"/}}{{id name="_Toc718"/}}{{id name="_Toc24813"/}}**Types of high-speed counters** ==
4
5 **(1) Single-phase input counter (S/W)**
6
7 The counting method of single-phase input counter (S/W) is as follows:
8
9 (% style="text-align:center" %)
10 [[image:06_html_1e47cfe250daeab9.gif||height="295" width="800" class="img-thumbnail"]]
11
12 **(2) AB phase input counter [1 times frequency]**
13
14 The counting method of AB phase input counter [1 times frequency] is as follows:
15
16 (% class="table-bordered" %)
17 |**Increase/decrease action**|**Timing**
18 |When counting up|Phase A input is ON and phase B input is OFF→ON, the count will increase by 1
19 |When counting down|When the A phase input is ON and the B phase input is ON→OFF, the count will decrease by 1
20
21 When counting up When counting down
22
23 (% style="text-align:center" %)
24 [[image:06_html_ac46591380ef206a.png||height="246" width="600" class="img-thumbnail"]]
25
26
27 (% style="text-align:center" %)
28 [[image:06_html_c364a1bf3d1a365c.png||height="229" width="600" class="img-thumbnail"]]
29
30 **(3) AB phase input counter [2 times frequency]**
31
32 The counting method of 2-phase 2-input counter [2 times frequency] is as follows:
33
34 (% class="table-bordered" %)
35 |**Increase/decrease action**|**Timing**
36 |When counting up|(((
37 When the A phase input is ON and the B phase input is OFF→ON, the count will increase by 1;
38
39 The count will increase by 1 when the phase A input is OFF and the phase B input is ON→OFF.
40 )))
41 |When counting down|(((
42 When A phase input is ON and B phase input is ON→OFF, the count will decrease by 1;
43
44 When phase A input is OFF and phase B input changes from OFF→ON, the count will decrement by 1.
45 )))
46
47 When counting up When counting down
48
49 (% style="text-align:center" %)
50 [[image:06_html_3e8bfd2357550970.png||height="248" width="600" class="img-thumbnail"]]
51
52
53 (% style="text-align:center" %)
54 [[image:06_html_419030bdafb27bdd.png||height="243" width="600" class="img-thumbnail"]]
55
56 **(4) AB phase input counter [4 times frequency]**
57
58 The counting method of 2-phase 2-input counter [4 times frequency] is as follows:
59
60 (% class="table-bordered" %)
61 |**Increase/decrease action**|**Timing**
62 |When counting up|(((
63 When B phase input is OFF and A phase input is OFF→ON, the count will increase by 1;
64
65 When the A phase input is ON and the B phase input is OFF→ON, the count will increase by 1;
66
67 When B phase input is ON and A phase input is ON→OFF, the count will increase by 1;
68
69 The count will increase by 1 when the phase A input is OFF and the phase B input is ON→OFF.
70 )))
71 |When counting down|(((
72 When A phase input is OFF and B phase input is OFF→ON, the count will decrease by 1;
73
74 When B phase input is ON and A phase input is OFF→ON, the count will decrease by 1;
75
76 When A phase input is ON and B phase input is ON→OFF, the count will decrease by 1;
77
78 When Phase B input is OFF and Phase A input is ON→OFF, the count will decrement by 1.
79 )))
80
81 When counting up When counting down
82
83 (% style="text-align:center" %)
84 [[image:06_html_1b2c59f550739e07.png||height="285" width="600"]]
85
86
87 (% style="text-align:center" %)
88 [[image:06_html_418c9dc9a21844f8.png||height="289" width="600" class="img-thumbnail"]]
89
90 == {{id name="_Toc2131"/}}**Highest frequency** ==
91
92 The maximum countable frequency of various high-speed counters is as follows:
93
94 (% class="table-bordered" %)
95 |**Counter type**|**Highest frequency**
96 |Single phase input counter (S/W)|150KHz
97 |AB phase input counter [1 times frequency]|100KHz
98 |AB phase input counter [2 times frequency]|100KHz
99 |AB phase input counter [4 times frequency]|100KHz
100
101 Counting range: -2147483648 to 2147483647, which is a signed 32-bit ring counter.{{id name="_Toc14212"/}}{{id name="_Toc30428"/}}{{id name="_Toc9824"/}}
102
103 == **{{id name="_Toc13801"/}}High-speed counter allocation** ==
104
105 The input soft components of various types of high-speed counters are fixedly allocated, including 8 channels HSC0 to HSC7.
106
107 Each channel can be changed to single-phase input or AB-phase input according to the high-speed counter configuration, but it should be noted that the occupied X point cannot be repeated.
108
109 (% class="table-bordered" %)
110 |**Channel**|**High-speed counter type**|**X0**|**X1**|**X2**|**X3**|**X4**|**X5**|**X6**|**X7**|**X10**|**X11**|**X12**|**X13**|**X14**|**X15**|**X16**|**X17**
111 |(% rowspan="2" %)HSC0|Single phase input (S/W)|A| | | | | | | | | | | | | | |
112 |AB phase input|A|B| | | | | | | | | | | | | |
113 |(% rowspan="2" %)HSC1|Single phase input (S/W)| |A| | | | | | | | | | | | | |
114 |AB phase input| | |A|B| | | | | | | | | | | |
115 |(% rowspan="2" %)HSC2|Single phase input (S/W)| | |A| | | | | | | | | | | | |
116 |AB phase input| | | | |A|B| | | | | | | | | |
117 |(% rowspan="2" %)HSC3|Single phase input (S/W)| | | |A| | | | | | | | | | | |
118 |AB phase input| | | | | | |A|B| | | | | | | |
119 |(% rowspan="2" %)HSC4|Single phase input (S/W)| | | | |A| | | | | | | | | | |
120 |AB phase input| | | | | | | | |A|B| | | | | |
121 |(% rowspan="2" %)HSC5|Single phase input (S/W)| | | | | |A| | | | | | | | | |
122 |AB phase input| | | | | | | | | | |A|B| | | |
123 |(% rowspan="2" %)HSC6|Single phase input (S/W)| | | | | | |A| | | | | | | | |
124 |AB phase input| | | | | | | | | | | | |A|B| |
125 |(% rowspan="2" %)HSC7|Single phase input (S/W)| | | | | | | |A| | | | | | | |
126 |AB phase input| | | | | | | | | | | | | | |A|B
127
128 A: Phase A input B: Phase B input
129
130 (% class="box infomessage" %)
131 (((
132 **✎Note: **After HSC0 uses the AB phase input, HSC1 can no longer use single-phase input, because HSC0 occupies two points X0 and X1, and if HSC1 wants to use single-phase input, X1 needs to be occupied and conflicts occur. The same is true for other channels.
133 )))
134
135 == {{id name="_Toc23555"/}}**{{id name="_Toc28139"/}}{{id name="_Toc17886"/}}High-speed counter use steps** ==
136
137 The following describes the steps to use the high-speed counter.
138
139 “Project management” → “Parameter” → “High-speed counter configuration”
140
141 **(1) Screen display**
142
143 (% style="text-align:center" %)
144 [[image:06_html_d777376833bca061.png||class="img-thumbnail"]]
145
146 **(2) Display content**
147
148 (((
149 (% class="table-bordered" %)
150 |(% style="width:161px" %)**Parameter**|(% style="width:210px" %)**Range**|(% style="width:486px" %)**Instruction**|(% style="width:218px" %)**Defaults**
151 |(% style="width:161px" %)Use or not|(% style="width:210px" %)Use/not use|(% style="width:486px" %)Set whether to use the counter.|(% style="width:218px" %)Unused
152 |(% style="width:161px" %)(((
153 Pulse input
154
155 mode
156 )))|(% style="width:210px" %)(((
157 Single phase input
158
159 AB phase input
160 )))|(% style="width:486px" %)Choose to use single phase input or AB phase input|(% style="width:218px" %)Single phase input
161 |(% style="width:161px" %)Counting direction|(% style="width:210px" %)Up counting mode down counting mode|(% style="width:486px" %)Select up/down counting mode, valid only when single-phase input|(% style="width:218px" %)Up counting mode
162 |(% style="width:161px" %)Frequency multiplication|(% style="width:210px" %)(((
163 One times frequency
164
165 two times frequency
166
167 four times frequency
168 )))|(% style="width:486px" %)Select input count multiplier, only valid when AB phase input|(% style="width:218px" %)One times frequency
169 |(% style="width:161px" %)Input frequency test time (ms)|(% style="width:210px" %)1 to 32767(ms)|(% style="width:486px" %)Set how often the input frequency is measured at the interval. The shorter the set time, the less accurate the frequency. The frequency measurement result is output in the special register SD. For details, see the description of the SD high-speed counter in the special register.|(% style="width:218px" %)1000ms
170 |(% style="width:161px" %)Filter time|(% style="width:210px" %)0 to 1700(0.01us)|(% style="width:486px" %)(((
171 Set the X point of this channel as the filter time for high-speed input. The smaller the filter setting, the more accurate the theoretical count, but the anti-interference ability will be reduced (the filter time is only valid for unidirectional input).
172
173 When the input is 0, it is the lowest filter time supported by the system.
174 )))|(% style="width:218px" %)1
175 |(% style="width:161px" %)Highest frequency|(% style="width:210px" %)(((
176 Single phase input: 150K
177
178 AB phase input: 100K
179 )))|(% style="width:486px" %)Display the highest input frequency that each channel can reach, read only|(% style="width:218px" %)
180 |(% style="width:161px" %)Occupy X points|(% style="width:210px" %)-|(% style="width:486px" %)Show which X points are occupied after using the channel, read only|(% style="width:218px" %)
181 |(% style="width:161px" %)Check button|(% style="width:210px" %) |(% style="width:486px" %)Check whether the configured X input point is reused, it is recommended to click check when setting is completed, and then confirm the input|(% style="width:218px" %)
182 |(% style="width:161px" %)Restore to default|(% style="width:210px" %) |(% style="width:486px" %)Restore to the same default settings as above|(% style="width:218px" %)
183 |(% style="width:161px" %)Input (X) description|(% style="width:210px" %) |(% style="width:486px" %)Pop up the description table of all modes of each channel occupying X|(% style="width:218px" %)
184 |(% style="width:161px" %)Confirm input|(% style="width:210px" %) |(% style="width:486px" %)After the configuration is complete, click to confirm the input to save the configuration and take effect|(% style="width:218px" %)
185 )))
186
187 **(3) Configuration example**
188
189 HSC0 to HSC3 are configured as 4 single-phase inputs, and HSC4 to HSC7 are configured as 4 AB phase inputs.
190
191 (% style="text-align:center" %)
192 [[image:06_html_dbe773365667f46e.png||class="img-thumbnail"]]
193
194 Use the OUT HSC instruction in the main program to enable High-speed counter. At this time, as long as there is an external pulse input, the pulse value can be observed in HSC0 to HSC7.
195
196 (% style="text-align:center" %)
197 [[image:06_html_3efdf7c077c62e66.png||class="img-thumbnail"]]
198
199 In the double word composed of special soft components SD403 and SD402, the current input pulse frequency of HSC0 can be monitored. Other channels also have corresponding registers, please refer to the description of special registers for details.
200
201 If the counter need to be stopped, just turn off the OUT HSC instruction.
202
203 = {{id name="_Toc9685"/}}**High-speed counter instructions** =
204
205 == {{id name="_Toc25634"/}}{{id name="_Toc31644"/}}{{id name="_Toc7551"/}}{{id name="_Toc13244"/}}**OUT HSC/High-speed counter switch** ==
206
207 When the operation result before the OUT HSC instruction is ON, the high-speed counter is turned on. At this time, the value of the HSC register records the number of high-speed pulses currently received. If the count value is reached, the corresponding HSC bit register becomes on.
208
209 -[OUT (d) (value)]
210
211 **Content, range and data type**
212
213 (% class="table-bordered" %)
214 |**Parameter**|**Content**|**Range**|**Data type**|**Data type (label)**
215 |(d)|High-speed counter channel|HSC0 to HSC7|Signed BIN 32 bit|ANY32
216 |(value)|High-speed counter setting value|-2147483648 to 2147483647|Signed BIN 32 bit|ANY32
217
218 **Device used**
219
220 (% class="table-bordered" %)
221 |(% rowspan="2" %)**Instruction**|(% rowspan="2" %)**Parameter**|(% colspan="9" %)**Devices**|**Offset modification**|(((
222 **Pulse**
223
224 **extension**
225 )))
226 |**KnX**|**KnY**|**KnM**|**KnS**|**D**|**R**|**SD**|**HSC**|**K**|**[D]**|**XXP**
227 |(% rowspan="2" %)OUT HSC|Parameter 1| | | | | | | |●| | |
228 |Parameter 2|●|●|●|●|●|●|●| |●| |
229
230 **Features**
231
232 To enable or disable high-speed counter counting, please configure the high-speed input channel to use the high-speed counter. For details, refer to the high-speed counter description.
233
234 (% class="table-bordered" %)
235 |**Operation result before instruction**|**Action**|**HSC data register status**|**HSC bit register status**
236 |ON|Turn on High-speed counter|The value is accumulated according to the input pulse|Turn ON when the value reaches the set value, otherwise OFF
237 |OFF|Stop High-speed counter|The value remains the same|State remains unchanged
238
239 **Error code**
240
241 (% class="table-bordered" %)
242 |**Error code**|**Content**
243 |4085H|(value) The read address exceeds the device range
244 |2580H|After the high-speed counter is turned on, but the axis high-speed counter enable is not configured
245
246 **Example**
247
248 HSC0 to HSC3 are configured as 4 single-phase inputs, and HSC4 to HSC7 are configured as 4 AB phase inputs.
249
250 (% style="text-align:center" %)
251 [[image:06_html_2b0022e3367742cb.png||class="img-thumbnail"]]
252
253 Use the OUT HSC instruction in the main program to enable High-speed counter. At this time, as long as there is an external pulse input, the pulse value can be observed in HSC0 to HSC7.
254
255 (% style="text-align:center" %)
256 [[image:06_html_9e4faa3072756308.png||class="img-thumbnail"]]
257
258 In the double word composed of special soft components SD403 and SD402, the current input pulse frequency of HSC0 can be monitored. Other channels also have corresponding registers, please refer to the description of special registers for details.
259
260 When the value of HSC0 is greater than 0, the contact of HSC0 will be set, and the other channels are the same. As shown in the circuit program below, Y0 will be turned on.
261
262 (% style="text-align:center" %)
263 [[image:06_html_341b6c3655d0cf6c.png||class="img-thumbnail"]]
264
265 == **DHSCS/High-speed comparison set** ==
266
267 Comparing the counted value in the high-speed counter with the specified value each time it counts, and then immediately set the bit device instruction.
268
269 -[DHSCS (s1) (s2) (d)]
270
271 **Content, range and data type**
272
273 (% class="table-bordered" %)
274 |**Parameter**|(% style="width:572px" %)**Content**|(% style="width:168px" %)**Range**|(% style="width:180px" %)**Data type**|**Data type (label)**
275 |(s1)|(% style="width:572px" %)The data compared with the current value of the high-speed counter, or the word device number where the data to be compared is stored|(% style="width:168px" %)-2147483648 to +2147483647|(% style="width:180px" %)Signed BIN 32 bit|ANY32
276 |(s2)|(% style="width:572px" %)High-speed counter device|(% style="width:168px" %)HSC0 to HSC7|(% style="width:180px" %)Signed BIN 32 bit|ANY32
277 |(d)|(% style="width:572px" %)Bit device number set (ON) when they match|(% style="width:168px" %) |(% style="width:180px" %)Bit|ANY_BOOL
278
279 **Device used**
280
281 (% class="table-bordered" %)
282 |(% rowspan="2" %)**Instruction**|(% rowspan="2" style="width:124px" %)**Parameter**|(% colspan="16" style="width:640px" %)**Devices**|(% style="width:133px" %)**Offset modification**|(((
283 **Pulse**
284
285 **extension**
286 )))
287 |(% style="width:7px" %)**Y**|**M**|**S**|**SM**|**D.b**|**KnX**|**KnY**|**KnM**|**KnS**|**D**|**R**|**SD**|**LC**|**HSC**|**K**|(% style="width:46px" %)**H**|(% style="width:133px" %)**[D]**|**XXP**
288 |(% rowspan="3" %)DHSCS|(% style="width:124px" %)Parameter 1|(% style="width:7px" %) | | | | |●|●|●|●|●|●|●|●|●|●|(% style="width:46px" %)●|(% style="width:133px" %)●|
289 |(% style="width:124px" %)Parameter 2|(% style="width:7px" %) | | | | | | | | | | | | |●| |(% style="width:46px" %) |(% style="width:133px" %) |
290 |(% style="width:124px" %)Parameter 3|(% style="width:7px" %)●|●|●|●|●| | | | | | | | | | |(% style="width:46px" %) |(% style="width:133px" %) |
291
292 **Features**
293
294 • When the current value of the high-speed counter of the channel specified in (s2) becomes the comparison value (s1) (in the case of the comparison value K200, 199→200 and 201→200), regardless of the scan time, the bit device (d) Both will be set (ON). This instruction performs comparison processing after the counting processing of the high-speed counter.
295
296 (% style="text-align:center" %)
297 [[image:06_html_9c2964c41710aa3a.gif||class="img-thumbnail"]]
298
299 • If the device specified in (d) is Y0 to Y20, when (d) is set, Y will be directly mapped to the actual hardware output, regardless of the scan cycle.
300
301 • DHSCS parameter 3 can also use the interrupt function name as a parameter. As shown in the figure below, the interrupt program INT0 will be executed when HSC0 is from (19999→20000) or (20001→20000).
302
303 (% style="text-align:center" %)
304 [[image:06_html_c0f44bbd411e514b.png||class="img-thumbnail"]]
305
306 **✎Note: **
307
308 The high-speed counter interrupt only supports a total of 100 programs, and each DHSCS is also counted in these 100. If it exceeds, an operation error will be reported.
309
310 **Error code**
311
312 (% class="table-bordered" %)
313 |**Error code**|**Content**
314 |4084H|The input device in (s2) exceeds the range of HSC0 to HSC7
315 |4085H|(s1) and (s2) read addresses exceed the device range
316 |4086H|(d) write address exceeds the device range
317 |2406H|The number of high-speed counter interrupts exceeds 100
318 |4F81H|DHSCS,SHSCR and DHSZ runs,but OUT HSC does not program
319
320 **Example**
321
322 To configure the high-speed counter, take HSC0 as an example.
323
324 (% style="text-align:center" %)
325 [[image:06_html_1fc642344648be8.png||class="img-thumbnail"]]
326
327 (% style="text-align:center" %)
328 [[image:06_html_eca12d4c32de1d3e.png||class="img-thumbnail"]]
329
330 In scanning MAIN, use the EI instruction to enable the interrupt, and then use the OUT HSC instruction to turn on the high-speed counter.
331
332 After M0 is turned on, when the value of HSC0 changes from 19999→20000, the INT0 program is executed once, that is, D0 is increased by 1.
333
334 When the value of HSC0 changes from 20000→20001, the INT0 program is not executed, that is, D0 remains at 1.
335
336 When the value of HSC0 changes from 20001→20000, the INT0 program is executed once, that is, D0 is increased by 1, and D0 is 2.
337
338 == **DHSCR/High-speed comparison reset** ==
339
340 Each time it counts, compare the counted value in the high-speed counter with the specified value, and then immediately reset the bit device instruction.
341
342 -[DHSCR (s1) (s2) (d)]
343
344 **Content, range and data type**
345
346 (% class="table-bordered" %)
347 |**Parameter**|(% style="width:541px" %)**Content**|(% style="width:190px" %)**Range**|(% style="width:168px" %)**Data type**|**Data type (label)**
348 |(s1)|(% style="width:541px" %)The data compared with the current value of the high-speed counter, or the word device number where the data to be compared is stored|(% style="width:190px" %)-2147483648 to 2147483647|(% style="width:168px" %)Signed BIN 32 bit|ANY32
349 |(s2)|(% style="width:541px" %)High-speed counter device|(% style="width:190px" %)HSC0 to HSC7|(% style="width:168px" %)Signed BIN 32 bit|ANY32
350 |(d)|(% style="width:541px" %)Bit device number reset (OFF) when they match|(% style="width:190px" %) |(% style="width:168px" %)Bit|ANY_BOOL
351
352 **Device used**
353
354 (% class="table-bordered" %)
355 |(% rowspan="2" %)**Instruction**|(% rowspan="2" style="width:128px" %)**Parameter**|(% colspan="16" style="width:646px" %)**Devices**|(% style="width:122px" %)**Offset modification**|(((
356 **Pulse**
357
358 **extension**
359 )))
360 |(% style="width:3px" %)**Y**|**M**|**S**|**SM**|**D.b**|**KnX**|**KnY**|**KnM**|**KnS**|**D**|**R**|**SD**|**LC**|**HSC**|**K**|(% style="width:56px" %)**H**|(% style="width:122px" %)**[D]**|**XXP**
361 |(% rowspan="3" %)DHSCR|(% style="width:128px" %)Parameter 1|(% style="width:3px" %) | | | | |●|●|●|●|●|●|●|●|●|●|(% style="width:56px" %)●|(% style="width:122px" %)●|
362 |(% style="width:128px" %)Parameter 2|(% style="width:3px" %) | | | | | | | | | | | | |●| |(% style="width:56px" %) |(% style="width:122px" %) |
363 |(% style="width:128px" %)Parameter 3|(% style="width:3px" %)●|●|●|●|●| | | | | | | | | | |(% style="width:56px" %) |(% style="width:122px" %) |
364
365 **Features**
366
367 • When the current value of the high-speed counter of the channel specified in (s2) becomes the comparison value (s1) (in the case of the comparison value K200, 199→200 and 201→200), regardless of the scan time, the bit device (d) Both will be reset (OFF). This instruction performs comparison processing after the counting processing of the high-speed counter.
368
369 (% style="text-align:center" %)
370 [[image:06_html_bcd0e12f54a850fd.gif||class="img-thumbnail"]]
371
372 • If the device specified in (d) is Y0 to Y20, when (d) is set, Y will be directly mapped to the actual hardware output, regardless of the scan cycle.
373
374 **✎Note: **
375
376 The high-speed counter interrupt only supports a total of 100 programs, and each DHSCR is also counted in these 100. If it exceeds, an operation error will be reported.
377
378 **Error code**
379
380 (% class="table-bordered" %)
381 |**Error code**|**Content**
382 |4084H|The input device in (s2) exceeds the range of HSC0 to HSC7
383 |4085H|The (s1) and (s2) read addresses exceed the device range
384 |4086H|The (d) write address exceeds the device range
385 |2406H|The number of high-speed counter interrupts exceeds 100
386 |4F81H|DHSCS,SHSCR and DHSZ runs,but OUT HSC does not program.
387
388 **Example**
389
390 To configure the high-speed counter, use HSC0 as an example.
391
392 (% style="text-align:center" %)
393 [[image:06_html_849d9e6d4f401046.png||class="img-thumbnail"]]
394
395 (% style="text-align:center" %)
396 [[image:06_html_f2fae0d743f2329f.png||class="img-thumbnail"]]
397
398 Use the OUT HSC instruction to turn on the high-speed counter while scanning MAIN.
399
400 After M0 is turned on, when the value of HSC0 changes from 99→100, reset Y0 and D0 will increase by 1.
401
402 == **DHSZ/High-speed zone comparison** ==
403
404 The current value of the high-speed counter is compared with two values (bandwidth), and the comparison result is output.
405
406 -[DHSZ (s1) (s2) (s3) (d)]
407
408 **Content, range and data type**
409
410 (% class="table-bordered" %)
411 |**Parameter**|(% style="width:523px" %)**Content**|(% style="width:150px" %)**Range**|(% style="width:195px" %)**Data type**|**Data type (label)**
412 |(s1)|(% style="width:523px" %)The data compared with the current value of the high-speed counter, or the word device number (comparison value 1) where the data to be compared is stored|(% style="width:150px" %)-2147483648 to 2147483647|(% style="width:195px" %)Signed BIN 32 bit|ANY32
413 |(s2)|(% style="width:523px" %)The data compared with the current value of the high-speed counter, or the word device number (comparison value 2) where the data to be compared is stored|(% style="width:150px" %)-2147483648 to 2147483647|(% style="width:195px" %)Signed BIN 32 bit|ANY32
414 |(s2)|(% style="width:523px" %)High-speed counter device|(% style="width:150px" %)HSC0 to HSC7|(% style="width:195px" %)Signed BIN 32 bit|ANY32
415 |(d)|(% style="width:523px" %)The device number of the start bit of the comparison result output in comparison value 1 and comparison value 2|(% style="width:150px" %) |(% style="width:195px" %)Bit|(((
416 ANYBIT_ARRAY
417
418 (number of elements: 3)
419 )))
420
421 **Device used**
422
423 (% class="table-bordered" style="width:1011px" %)
424 |(% rowspan="2" %)**Instruction**|(% rowspan="2" style="width:145px" %)**Parameter**|(% colspan="16" style="width:573px" %)**Devices**|(% style="width:124px" %)**Offset modification**|(((
425 **Pulse**
426
427 **extension**
428 )))
429 |(% style="width:8px" %)**Y**|**M**|**S**|**SM**|**D.b**|**KnX**|**KnY**|**KnM**|**KnS**|**D**|**R**|**SD**|**LC**|**HSC**|**K**|(% style="width:54px" %)**H**|(% style="width:124px" %)**[D]**|**XXP**
430 |(% rowspan="4" %)DHSCZ|(% style="width:145px" %)Parameter 1|(% style="width:8px" %) | | | | |●|●|●|●|●|●|●|●|●|●|(% style="width:54px" %)●|(% style="width:124px" %)●|
431 |(% style="width:145px" %)Parameter 2|(% style="width:8px" %) | | | | |●|●|●|●|●|●|●|●|●|●|(% style="width:54px" %)●|(% style="width:124px" %)●|
432 |(% style="width:145px" %)Parameter 3|(% style="width:8px" %) | | | | | | | | | | | | |●| |(% style="width:54px" %) |(% style="width:124px" %) |
433 |(% style="width:145px" %)Parameter 4|(% style="width:8px" %)●|●|●|●|●| | | | | | | | | | |(% style="width:54px" %) |(% style="width:124px" %) |
434
435 **Features**
436
437 • Compare the current value of the high-speed counter specified in (s3) with two comparison values (comparison value 1, comparison value 2), regardless of the scan time, (d), (d)+1, (d)+2 One item in will turn ON according to the comparison result (lower, in area, upper).
438
439 (% style="text-align:center" %)
440 [[image:06_html_6a81ab6c39ea0263.gif||class="img-thumbnail"]]
441
442 • If the device specified in (d) is Y0 to Y15, when (d), (d+1), (d+2) are set, Y will be directly mapped to the actual hardware output, not affected by the scan cycle .
443
444 • When setting [Comparison Value 1] and [Comparison Value 2], please ensure that [Comparison Value 1]<[Comparison Value 2]. If the settings are different, an operation error will occur, and the DHSZ instruction will not execute the action.
445
446 **✎Note: **
447
448 The high-speed counter interrupt only supports a total of 100 programs, and each DHSZ is also counted in these 100, and the DHSZ instruction will occupy the space of 2 interrupt programs. If it exceeds, an operation error will be reported.
449
450 The comparison result occupies the unit of 3 consecutive addresses starting with (d). Please be careful not to overlap with other controlled devices. In addition, when specifying the Y device, please set it not to exceed the actual number of Y point outputs.
451
452 **Error code**
453
454 (% class="table-bordered" %)
455 |**Error code**|**Content**
456 |4084H|(s2) The input device exceeds the range of HSC0 to HSC7
457 |4085H|(s1)(s2) The read address exceeds the device range
458 |4086H|(d) The write address exceeds the device range
459 |2406H|The number of high-speed counter interrupts exceeds 100
460 |4F81H|DHSCS,SHSCR and DHSZ runs,but OUT HSC does not program
461
462 **Example**
463
464 To configure the high-speed counter, use HSC0 as an example.
465
466 (% style="text-align:center" %)
467 [[image:06_html_58a6a3ee3a7a5af3.png||class="img-thumbnail"]]
468
469 Scanner
470
471 (% style="text-align:center" %)
472 [[image:06_html_2443a67146d411e4.png||class="img-thumbnail"]]
473
474 Execution results
475
476 (% class="table-bordered" %)
477 |(% rowspan="2" style="width:219px" %)**Comparison mode**|(% rowspan="2" style="width:394px" %)**Current value of channel 1 (s3)**|(% colspan="3" style="width:463px" %)**Change of output contact (Y)**
478 |(% style="width:162px" %)**Y0**|(% style="width:157px" %)**Y1**|**Y3**
479 |(% rowspan="3" style="width:219px" %)(S1)>(s3)|(% style="width:394px" %)1000>(s3)|(% style="width:162px" %)ON|(% style="width:157px" %)OFF|OFF
480 |(% style="width:394px" %)999→1000|(% style="width:162px" %)ON→OFF|(% style="width:157px" %)OFF→ON|OFF
481 |(% style="width:394px" %)1000→999|(% style="width:162px" %)OFF→ON|(% style="width:157px" %)ON→OFF|OFF
482 |(% rowspan="5" style="width:219px" %)(S1)≤(s3)≤(s2)|(% style="width:394px" %)999→1000|(% style="width:162px" %)ON→OFF|(% style="width:157px" %)OFF→ON|OFF
483 |(% style="width:394px" %)1000→999|(% style="width:162px" %)OFF→ON|(% style="width:157px" %)ON→OFF|OFF
484 |(% style="width:394px" %)1000≤(s3)≤2000|(% style="width:162px" %)OFF|(% style="width:157px" %)ON|OFF
485 |(% style="width:394px" %)2000→2001|(% style="width:162px" %)OFF|(% style="width:157px" %)ON→OFF|OFF→ON
486 |(% style="width:394px" %)2001→2000|(% style="width:162px" %)OFF|(% style="width:157px" %)OFF→ON|ON→OFF
487 |(% rowspan="3" style="width:219px" %)(S3)>(s2)|(% style="width:394px" %)2000→2001|(% style="width:162px" %)OFF|(% style="width:157px" %)ON→OFF|OFF→ON
488 |(% style="width:394px" %)2001→2000|(% style="width:162px" %)OFF|(% style="width:157px" %)OFF→ON|ON→OFF
489 |(% style="width:394px" %)(S3)>2000|(% style="width:162px" %)OFF|(% style="width:157px" %)OFF|ON