Changes for page Schneider

Last modified by Hunter on 2025/12/08 18:46

From version 4.1
edited by Hunter
on 2025/12/06 14:01
Change comment: There is no comment for this version
To version 4.3
edited by Hunter
on 2025/12/06 15:12
Change comment: There is no comment for this version

Summary

Details

Page properties
Content
... ... @@ -98,6 +98,40 @@
98 98  (% style="text-align:center" %)
99 99  [[image:1711078732764-435.png]]
100 100  
101 -= Schneider TM221 =
101 += Schneider TM221 Ethernet =
102 102  
103 -
103 +**Supported Series**: Modicon M221 Series
104 +
105 +**HMI Setting**
106 +
107 +|**Items**|(% style="width:440px" %)**Settings**|(% style="width:359px" %)**Note**
108 +|Protocol|(% style="width:440px" %)Schneider TM221|(% style="width:359px" %)
109 +|Connection|(% style="width:440px" %)Ethernet|(% style="width:359px" %)
110 +|Port No.|(% style="width:440px" %)502|(% style="width:359px" %)
111 +|Device No.|(% style="width:440px" %)1|(% style="width:359px" %)
112 +|HMI No.|(% style="width:440px" %)0|(% style="width:359px" %)
113 +
114 +**Address List**
115 +
116 +
117 +|=(% style="width: 316px;" %)**Type**|=(% style="width: 240px;" %)**Address Type**|=(% style="width: 208px;" %)**Format**|=(% style="width: 132px;" %)**Range**|=(% style="width: 305px;" %)**Note**
118 +|(% colspan="1" rowspan="8" style="width:316px" %)Bit|(% style="width:240px" %)IWMB|(% style="width:208px" %)IWMB DD.dd|(% style="width:132px" %)0~~20.15|(% style="width:305px" %)Output Register(Bit type)
119 +|(% style="width:240px" %)QWMB|(% style="width:208px" %)QWMB DD.dd|(% style="width:132px" %)0~~20.15|(% style="width:305px" %)Input Register(Bit type)
120 +|(% style="width:240px" %)MWB|(% style="width:208px" %)MWB DDDD.dd|(% style="width:132px" %)0~~8000.15|(% style="width:305px" %)Internal memory word(Bit type)
121 +|(% style="width:240px" %)M|(% style="width:208px" %)M DDDD|(% style="width:132px" %)0~~1024|(% style="width:305px" %)Internal memory bit
122 +|(% style="width:240px" %)IWB|(% style="width:208px" %)IWB DDDDDD.dd|(% style="width:132px" %)0~~255255.15|(% style="width:305px" %)Analog Input(Bit type)
123 +|(% style="width:240px" %)I|(% style="width:208px" %)I DDD.dd|(% style="width:132px" %)0~~255.13|(% style="width:305px" %)Digital Input
124 +|(% style="width:240px" %)Q|(% style="width:208px" %)Q DDD.d|(% style="width:132px" %)0~~255.9|(% style="width:305px" %)Digital Output
125 +|(% style="width:240px" %)S|(% style="width:208px" %)S DDD|(% style="width:132px" %)0~~159|(% style="width:305px" %)System Bit
126 +|(% colspan="1" rowspan="12" style="width:316px" %)Word|(% style="width:240px" %)IWM|(% style="width:208px" %)IWM DD|(% style="width:132px" %)0~~20|(% style="width:305px" %)Output Register
127 +|(% style="width:240px" %)QWM|(% style="width:208px" %)QWM DD|(% style="width:132px" %)0~~20|(% style="width:305px" %)Input Register
128 +|(% style="width:240px" %)MW|(% style="width:208px" %)MW DDDD|(% style="width:132px" %)0~~7999|(% style="width:305px" %)Internal memory word
129 +|(% style="width:240px" %)MD|(% style="width:208px" %)MD DDDD|(% style="width:132px" %)0~~7998|(% style="width:305px" %)Internal memory double word
130 +|(% style="width:240px" %)MF|(% style="width:208px" %)MF DDDD|(% style="width:132px" %)0~~7998|(% style="width:305px" %)Internal memory floating point
131 +|(% style="width:240px" %)IW|(% style="width:208px" %)IW DDDDDD|(% style="width:132px" %)0~~255255|(% style="width:305px" %)Analog Input
132 +|(% style="width:240px" %)SW|(% style="width:208px" %)SW DDD|(% style="width:132px" %)0~~233|(% style="width:305px" %)System word
133 +|(% style="width:240px" %)KW|(% style="width:208px" %)KW DDD|(% style="width:132px" %)0~~511|(% style="width:305px" %)Constant word
134 +|(% style="width:240px" %)KD|(% style="width:208px" %)KD DDD|(% style="width:132px" %)0~~510|(% style="width:305px" %)Internal constant double word
135 +|(% style="width:240px" %)KF|(% style="width:208px" %)KF DDD|(% style="width:132px" %)0~~510|(% style="width:305px" %)Internal constant floating point
136 +|(% style="width:240px" %)TM_V|(% style="width:208px" %)TM_V DDD|(% style="width:132px" %)0~~254|(% style="width:305px" %)Timer
137 +|(% style="width:240px" %)TM_P|(% style="width:208px" %)TM_P DDD|(% style="width:132px" %)0~~254|(% style="width:305px" %)Timer